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Searched refs:RCC_PLLCFGR_PLLSRC (Results 1 – 9 of 9) sorted by relevance

/bsp/mm32f327x/Libraries/MM32F327x/Source/
A Dsystem_mm32f327x.c383 RCC->PLLCFGR |= (u32 ) RCC_PLLCFGR_PLLSRC ; in SetSysClockTo24()
456 RCC->PLLCFGR |= (u32 ) RCC_PLLCFGR_PLLSRC ; in SetSysClockTo36()
529 RCC->PLLCFGR |= (u32 ) RCC_PLLCFGR_PLLSRC ; in SetSysClockTo48()
628 RCC->PLLCFGR &= ~((u32 ) RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLXTPRE) ; in SetSysClockToXX()
629 RCC->PLLCFGR |= (u32 ) RCC_PLLCFGR_PLLSRC ; in SetSysClockToXX()
675 RCC->PLLCFGR &= ~((u32 ) RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLXTPRE) ; in SetSysClockTo24_HSI()
676 RCC->PLLCFGR |= (u32 ) RCC_PLLCFGR_PLLSRC ; in SetSysClockTo24_HSI()
708 RCC->PLLCFGR &= ~((u32 ) RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLXTPRE) ; in SetSysClockTo36_HSI()
709 RCC->PLLCFGR |= (u32 ) RCC_PLLCFGR_PLLSRC ; in SetSysClockTo36_HSI()
746 RCC->PLLCFGR |= (u32 ) RCC_PLLCFGR_PLLSRC ; in SetSysClockTo48_HSI()
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/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Inc/
A Dhal_rcc.h114 RCC_HSE_Div1 = RCC_PLLCFGR_PLLSRC,
115 RCC_HSE_Div2 = (RCC_PLLCFGR_PLLXTPRE | RCC_PLLCFGR_PLLSRC),
/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/
A Dsystem_stm32g4xx.c232 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); in SystemCoreClockUpdate()
/bsp/stm32/stm32g491-st-nucleo/board/CubeMX_Config/Core/Src/
A Dsystem_stm32g4xx.c247 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); in SystemCoreClockUpdate()
/bsp/stm32/stm32l496-st-discovery/board/CubeMX_Config/Src/
A Dsystem_stm32l4xx.c286 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); in SystemCoreClockUpdate()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_rcc.c231 MODIFY_REG(RCC->PLLCFGR, (RCC_PLLCFGR_PLLXTPRE | RCC_PLLCFGR_PLLSRC), pll_src); in RCC_PLLConfig()
424 …clock = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC) ? (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLXTPRE)… in RCC_GetSysClockFreq()
/bsp/stm32/stm32f407-lckfb-skystar/board/CubeMX_Config/Src/
A Dsystem_stm32f4xx.c240 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; in SystemCoreClockUpdate()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h620 #define RCC_PLLCFGR_PLLSRC (0x01U << RCC_PLLCFGR_PLLSRC_Pos) ///< PLL entry clo… macro
/bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Device/MM32/MM32F3277/Include/
A Dmm32f3277g.h1520 #define RCC_PLLCFGR_PLLSRC(x) (((uint32_t)(((uint32_t)(x)) << RCC_PLLCFGR_PLLSRC_… macro

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