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Searched refs:RCU_CFG0_PLLSEL (Results 1 – 3 of 3) sorted by relevance

/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/Source/
A Dgd32vf103_rcu.c64 RCU_CFG0_ADCPSC | RCU_CFG0_PLLSEL | RCU_CFG0_PREDV0_LSB | RCU_CFG0_PLLMF | in rcu_deinit()
379 reg &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PLLMF | RCU_CFG0_PLLMF_4); in rcu_pll_config()
1030 pllsel = (RCU_CFG0 & RCU_CFG0_PLLSEL); in rcu_clock_freq_get()
/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/
A Dsystem_gd32vf103.c169 RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PREDV0_LSB | RCU_CFG0_PLLMF | in SystemInit()
213 pllsel = (RCU_CFG0 & RCU_CFG0_PLLSEL); in SystemCoreClockUpdate()
/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/Include/
A Dgd32vf103_rcu.h85 #define RCU_CFG0_PLLSEL BIT(16) /*!< PLL clock source selection */ macro
475 #define RCU_PLLSRC_HXTAL RCU_CFG0_PLLSEL /*!< HXTAL clock select…

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