RCU_PLL1_MUL8 (reference) in projects: bsp

Searched refs:RCU_PLL1_MUL8 (Results 1 – 2 of 2) sorted by relevance

/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/
A D	system_gd32vf103.c	356 RCU_CFG1 \|= (RCU_PREDV0SRC_CKPLL1 \| RCU_PLL1_MUL8 \| RCU_PREDV1_DIV5 \| RCU_PREDV0_DIV10); in system_clock_24m_hxtal() 427 RCU_CFG1 \|= (RCU_PREDV0SRC_CKPLL1 \| RCU_PLL1_MUL8 \| RCU_PREDV1_DIV5 \| RCU_PREDV0_DIV10); in system_clock_36m_hxtal() 499 RCU_CFG1 \|= (RCU_PREDV0SRC_CKPLL1 \| RCU_PLL1_MUL8 \| RCU_PREDV1_DIV5 \| RCU_PREDV0_DIV10); in system_clock_48m_hxtal() 573 RCU_CFG1 \|= (RCU_PREDV0SRC_CKPLL1 \| RCU_PLL1_MUL8 \| RCU_PREDV1_DIV5 \| RCU_PREDV0_DIV10); in system_clock_56m_hxtal() 646 RCU_CFG1 \|= (RCU_PREDV0SRC_CKPLL1 \| RCU_PLL1_MUL8 \| RCU_PREDV1_DIV5 \| RCU_PREDV0_DIV10); in system_clock_72m_hxtal() 718 RCU_CFG1 \|= (RCU_PREDV0SRC_CKPLL1 \| RCU_PLL1_MUL8 \| RCU_PREDV1_DIV5 \| RCU_PREDV0_DIV10); in system_clock_96m_hxtal() 793 RCU_CFG1 \|= (RCU_PREDV0SRC_CKPLL1 \| RCU_PREDV1_DIV5 \| RCU_PLL1_MUL8 \| RCU_PREDV0_DIV10); in system_clock_108m_hxtal()
/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/Include/
A D	gd32vf103_rcu.h	`579 #define RCU_PLL1_MUL8 CFG1_PLL1MF(6) /*!< PLL1 source clock … macro`

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