Searched refs:REG_SERCOM0_I2CM_INTENSET (Results 1 – 7 of 7) sorted by relevance
57 #define REG_SERCOM0_I2CM_INTENSET (0x4200080DU) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro95 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x4200080DU) /**< \brief (SERCOM0) I2CM Interrupt En… macro
53 #define REG_SERCOM0_I2CM_INTENSET (0x42000816U) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro96 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000816U) /**< \brief (SERCOM0) I2CM Interrupt En… macro
39 #define REG_SERCOM0_I2CM_INTENSET (0x42000416) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro83 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
41 #define REG_SERCOM0_I2CM_INTENSET (0x42000416) /**< (SERCOM0) I2CM Interrupt Enable Set */ macro88 #define REG_SERCOM0_I2CM_INTENSET (*(__IO uint8_t*)0x42000416U) /**< (SERCOM0) I2CM Interrupt Enabl… macro
40 #define REG_SERCOM0_I2CM_INTENSET (0x40003016) /**< \brief (SERCOM0) I2CM Interrupt Enable Set */ macro91 #define REG_SERCOM0_I2CM_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) I2CM Interrupt E… macro
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