Searched refs:REG_SERCOM0_I2CS_INTENSET (Results 1 – 7 of 7) sorted by relevance
65 #define REG_SERCOM0_I2CS_INTENSET (0x4200080DU) /**< \brief (SERCOM0) I2CS Interrupt Enable Set */ macro103 #define REG_SERCOM0_I2CS_INTENSET (*(RwReg8 *)0x4200080DU) /**< \brief (SERCOM0) I2CS Interrupt En… macro
63 #define REG_SERCOM0_I2CS_INTENSET (0x42000816U) /**< \brief (SERCOM0) I2CS Interrupt Enable Set */ macro106 #define REG_SERCOM0_I2CS_INTENSET (*(RwReg8 *)0x42000816U) /**< \brief (SERCOM0) I2CS Interrupt En… macro
49 #define REG_SERCOM0_I2CS_INTENSET (0x42000416) /**< \brief (SERCOM0) I2CS Interrupt Enable Set */ macro93 #define REG_SERCOM0_I2CS_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) I2CS Interrupt E… macro
51 #define REG_SERCOM0_I2CS_INTENSET (0x42000416) /**< (SERCOM0) I2CS Interrupt Enable Set */ macro98 #define REG_SERCOM0_I2CS_INTENSET (*(__IO uint8_t*)0x42000416U) /**< (SERCOM0) I2CS Interrupt Enabl… macro
51 #define REG_SERCOM0_I2CS_INTENSET (0x40003016) /**< \brief (SERCOM0) I2CS Interrupt Enable Set */ macro102 #define REG_SERCOM0_I2CS_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) I2CS Interrupt E… macro
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