Searched refs:REG_SERCOM0_SPI_INTENSET (Results 1 – 7 of 7) sorted by relevance
75 #define REG_SERCOM0_SPI_INTENSET (0x4200080DU) /**< \brief (SERCOM0) SPI Interrupt Enable Set */ macro113 #define REG_SERCOM0_SPI_INTENSET (*(RwReg8 *)0x4200080DU) /**< \brief (SERCOM0) SPI Interrupt Ena… macro
73 #define REG_SERCOM0_SPI_INTENSET (0x42000816U) /**< \brief (SERCOM0) SPI Interrupt Enable Set */ macro116 #define REG_SERCOM0_SPI_INTENSET (*(RwReg8 *)0x42000816U) /**< \brief (SERCOM0) SPI Interrupt Ena… macro
59 #define REG_SERCOM0_SPI_INTENSET (0x42000416) /**< \brief (SERCOM0) SPI Interrupt Enable Set */ macro103 #define REG_SERCOM0_SPI_INTENSET (*(RwReg8 *)0x42000416UL) /**< \brief (SERCOM0) SPI Interrupt En… macro
61 #define REG_SERCOM0_SPI_INTENSET (0x42000416) /**< (SERCOM0) SPI Interrupt Enable Set */ macro108 #define REG_SERCOM0_SPI_INTENSET (*(__IO uint8_t*)0x42000416U) /**< (SERCOM0) SPI Interrupt Enable … macro
63 #define REG_SERCOM0_SPI_INTENSET (0x40003016) /**< \brief (SERCOM0) SPI Interrupt Enable Set */ macro114 #define REG_SERCOM0_SPI_INTENSET (*(RwReg8 *)0x40003016UL) /**< \brief (SERCOM0) SPI Interrupt En… macro
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