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Searched refs:REG_SERCOM2_SPI_INTENSET (Results 1 – 7 of 7) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/instance/
A Dsercom2.h75 #define REG_SERCOM2_SPI_INTENSET (0x4200100DU) /**< \brief (SERCOM2) SPI Interrupt Enable Set */ macro
113 #define REG_SERCOM2_SPI_INTENSET (*(RwReg8 *)0x4200100DU) /**< \brief (SERCOM2) SPI Interrupt Ena… macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/instance/
A Dsercom2.h73 #define REG_SERCOM2_SPI_INTENSET (0x42001016U) /**< \brief (SERCOM2) SPI Interrupt Enable Set */ macro
116 #define REG_SERCOM2_SPI_INTENSET (*(RwReg8 *)0x42001016U) /**< \brief (SERCOM2) SPI Interrupt Ena… macro
/bsp/microchip/samc21/bsp/samc21/include/instance/
A Dsercom2.h59 #define REG_SERCOM2_SPI_INTENSET (0x42000C16) /**< \brief (SERCOM2) SPI Interrupt Enable Set */ macro
103 #define REG_SERCOM2_SPI_INTENSET (*(RwReg8 *)0x42000C16UL) /**< \brief (SERCOM2) SPI Interrupt En… macro
/bsp/microchip/saml10/bsp/include/instance/
A Dsercom2.h61 #define REG_SERCOM2_SPI_INTENSET (0x42000C16) /**< (SERCOM2) SPI Interrupt Enable Set */ macro
108 #define REG_SERCOM2_SPI_INTENSET (*(__IO uint8_t*)0x42000C16U) /**< (SERCOM2) SPI Interrupt Enable … macro
/bsp/microchip/same54/bsp/include/instance/
A Dsercom2.h63 #define REG_SERCOM2_SPI_INTENSET (0x41012016) /**< \brief (SERCOM2) SPI Interrupt Enable Set */ macro
114 #define REG_SERCOM2_SPI_INTENSET (*(RwReg8 *)0x41012016UL) /**< \brief (SERCOM2) SPI Interrupt En… macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/instance/
A Dsercom2.h63 #define REG_SERCOM2_SPI_INTENSET (0x41012016) /**< \brief (SERCOM2) SPI Interrupt Enable Set */ macro
114 #define REG_SERCOM2_SPI_INTENSET (*(RwReg8 *)0x41012016UL) /**< \brief (SERCOM2) SPI Interrupt En… macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/instance/
A Dsercom2.h63 #define REG_SERCOM2_SPI_INTENSET (0x41012016) /**< \brief (SERCOM2) SPI Interrupt Enable Set */ macro
114 #define REG_SERCOM2_SPI_INTENSET (*(RwReg8 *)0x41012016UL) /**< \brief (SERCOM2) SPI Interrupt En… macro

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