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Searched refs:REG_SERCOM5_SPI_INTENCLR (Results 1 – 6 of 6) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/instance/
A Dsercom5.h74 #define REG_SERCOM5_SPI_INTENCLR (0x42001C0CU) /**< \brief (SERCOM5) SPI Interrupt Enable Clear */ macro
112 #define REG_SERCOM5_SPI_INTENCLR (*(RwReg8 *)0x42001C0CU) /**< \brief (SERCOM5) SPI Interrupt Ena… macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/instance/
A Dsercom5.h72 #define REG_SERCOM5_SPI_INTENCLR (0x42001C14U) /**< \brief (SERCOM5) SPI Interrupt Enable Clear */ macro
115 #define REG_SERCOM5_SPI_INTENCLR (*(RwReg8 *)0x42001C14U) /**< \brief (SERCOM5) SPI Interrupt Ena… macro
/bsp/microchip/samc21/bsp/samc21/include/instance/
A Dsercom5.h58 #define REG_SERCOM5_SPI_INTENCLR (0x42001814) /**< \brief (SERCOM5) SPI Interrupt Enable Clear */ macro
102 #define REG_SERCOM5_SPI_INTENCLR (*(RwReg8 *)0x42001814UL) /**< \brief (SERCOM5) SPI Interrupt En… macro
/bsp/microchip/same54/bsp/include/instance/
A Dsercom5.h62 #define REG_SERCOM5_SPI_INTENCLR (0x43000414) /**< \brief (SERCOM5) SPI Interrupt Enable Clear */ macro
113 #define REG_SERCOM5_SPI_INTENCLR (*(RwReg8 *)0x43000414UL) /**< \brief (SERCOM5) SPI Interrupt En… macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/instance/
A Dsercom5.h62 #define REG_SERCOM5_SPI_INTENCLR (0x43000414) /**< \brief (SERCOM5) SPI Interrupt Enable Clear */ macro
113 #define REG_SERCOM5_SPI_INTENCLR (*(RwReg8 *)0x43000414UL) /**< \brief (SERCOM5) SPI Interrupt En… macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/instance/
A Dsercom5.h62 #define REG_SERCOM5_SPI_INTENCLR (0x43000414) /**< \brief (SERCOM5) SPI Interrupt Enable Clear */ macro
113 #define REG_SERCOM5_SPI_INTENCLR (*(RwReg8 *)0x43000414UL) /**< \brief (SERCOM5) SPI Interrupt En… macro

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