Searched refs:REG_TC2_INTENSET (Results 1 – 6 of 6) sorted by relevance
60 #define REG_TC2_INTENSET (0x4200280DU) /**< \brief (TC2) Interrupt Enable Set */ macro82 #define REG_TC2_INTENSET (*(RwReg8 *)0x4200280DU) /**< \brief (TC2) Interrupt Enable Set … macro
40 #define REG_TC2_INTENSET (0x42003809) /**< \brief (TC2) Interrupt Enable Set */ macro70 #define REG_TC2_INTENSET (*(RwReg8 *)0x42003809UL) /**< \brief (TC2) Interrupt Enable Set… macro
40 #define REG_TC2_INTENSET (0x4101A009) /**< \brief (TC2) Interrupt Enable Set */ macro70 #define REG_TC2_INTENSET (*(RwReg8 *)0x4101A009UL) /**< \brief (TC2) Interrupt Enable Set… macro
42 #define REG_TC2_INTENSET (0x42001809) /**< (TC2) Interrupt Enable Set */ macro84 #define REG_TC2_INTENSET (*(__IO uint8_t*)0x42001809U) /**< (TC2) Interrupt Enable Set */ macro
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