Home
last modified time | relevance | path

Searched refs:RT_CPUS_NR (Results 1 – 25 of 408) sorted by relevance

12345678910>>...17

/bsp/phytium/aarch64/applications/
A Dmain.c27 ASSERT_STATIC(RT_CPUS_NR == 1U); /* please set RT_CPUS_NR = 1 when SMP off */
30 ASSERT_STATIC(RT_CPUS_NR <= 2U); /* use 2 cores at most */
32 ASSERT_STATIC(RT_CPUS_NR <= 4U); /* use 4 cores at most */
34 ASSERT_STATIC(RT_CPUS_NR <= 8U); /* use 4 cores at most */
40 struct rt_thread test_core[RT_CPUS_NR];
52 static rt_uint8_t core_stack[RT_CPUS_NR][4096];
71 for (i = 0; i < RT_CPUS_NR; i++) in demo_core()
/bsp/phytium/aarch32/applications/
A Dmain.c29 ASSERT_STATIC(RT_CPUS_NR == 1U); /* please set RT_CPUS_NR = 1 when SMP off */
32 ASSERT_STATIC(RT_CPUS_NR <= 2U); /* use 2 cores at most */
34 ASSERT_STATIC(RT_CPUS_NR <= 4U); /* use 4 cores at most */
40 struct rt_thread test_core[RT_CPUS_NR];
52 static rt_uint8_t core_stack[RT_CPUS_NR][1024];
71 for (i = 0; i < RT_CPUS_NR; i++) in demo_core()
/bsp/ft2004/applications/
A Dmain.c20 struct rt_thread test_core[RT_CPUS_NR];
21 static char *core_thread_name[RT_CPUS_NR] = {
26 static rt_uint8_t core_stack[RT_CPUS_NR][1024];
45 for (i = 0; i < RT_CPUS_NR; i++) in demo_core()
/bsp/raspberry-pi/raspi4-64/drivers/
A Ddrv_gtimer.c9 #ifndef RT_CPUS_NR
10 #define RT_CPUS_NR 1 macro
15 static uint64_t _tickval[RT_CPUS_NR];
16 static uint64_t _increaseval[RT_CPUS_NR];
/bsp/phytium/board/
A Dsmp_sgi_test.c27 struct rt_thread core_test_thread[RT_CPUS_NR];
40 static rt_uint8_t core_stack[RT_CPUS_NR][4096];
66 for (i = 0; i < RT_CPUS_NR; i++) in demo_core_test()
89 for (rt_uint32_t i = 0; i < RT_CPUS_NR; i++) in smp_sgi_test_thread()
A Dsecondary_cpu.c61 [RT_CPUS_NR] = 0
73 for (i = 0; i < RT_CPUS_NR; i++) in rt_hw_secondary_cpu_up()
/bsp/ft2004/drivers/
A Dboard.c114 #if RT_CPUS_NR == 2 in rt_hw_board_init()
117 #elif RT_CPUS_NR == 3 in rt_hw_board_init()
120 #elif RT_CPUS_NR == 4 in rt_hw_board_init()
A Dsecondary_cpu.c34 for (i = 1; i < RT_CPUS_NR; i++) in rt_hw_secondary_cpu_up()
/bsp/rockchip/rk3568/driver/
A Dboard.c140 [RT_CPUS_NR] = 0
151 for (i = 1; i < RT_CPUS_NR; ++i) in rt_hw_secondary_cpu_up()
/bsp/nxp/lpc/lpc1114/
A Drtconfig.h66 #define RT_CPUS_NR 1 macro
/bsp/rockchip/rk3500/driver/hwtimer/
A Dhwtimer-rockchip_timer.c286 RT_BITMAP_DECLARE(affinity, RT_CPUS_NR) = { 0 }; in rk_timer_probe()
287 rt_bitmap_set_bit(affinity, RT_CPUS_NR - 1); in rk_timer_probe()
294 RT_BITMAP_DECLARE(affinity, RT_CPUS_NR) = {0}; in rk_timer_probe()
/bsp/nxp/lpc/lpc824/
A Drtconfig.h66 #define RT_CPUS_NR 1 macro
/bsp/k210/board/
A Dcpuport_smp.c47 for (idx = 0; idx < RT_CPUS_NR; idx ++) in rt_hw_ipi_send()
/bsp/microchip/saml10/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/bouffalo_lab/bl808/lp/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/sam7x/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/gd32/arm/gd32e230-lckfb/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/nxp/lpc/lpc2148/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/essemi/es32vf2264/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/lm4f232/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/mm32f327x/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/mm32l07x/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/mm32l3xx/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro
/bsp/stm32/stm32mp157a-st-discovery/
A Drtconfig.h68 #define RT_CPUS_NR 1 macro
/bsp/hpmicro/hpm5300evk/
A Drtconfig.h65 #define RT_CPUS_NR 1 macro

Completed in 35 milliseconds

12345678910>>...17