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Searched refs:RegBase (Results 1 – 25 of 28) sorted by relevance

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/bsp/nuvoton/libraries/ma35/rtt_port/gmac/
A DsynopGMAC_plat.c19 u32 synopGMACReadReg(u32 RegBase, u32 RegOffset) in synopGMACReadReg() argument
21 u32 addr = RegBase + RegOffset; in synopGMACReadReg()
31 void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData) in synopGMACWriteReg() argument
33 u32 addr = RegBase + (u32)RegOffset; in synopGMACWriteReg()
44 void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos) in synopGMACSetBits() argument
46 u32 data = synopGMACReadReg(RegBase, RegOffset) | BitPos; in synopGMACSetBits()
48 synopGMACWriteReg(RegBase, RegOffset, data); in synopGMACSetBits()
57 void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos) in synopGMACClearBits() argument
61 synopGMACWriteReg(RegBase, RegOffset, data); in synopGMACClearBits()
70 bool synopGMACCheckBits(u32 RegBase, u32 RegOffset, u32 BitPos) in synopGMACCheckBits() argument
[all …]
A DsynopGMAC_plat.h37 u32 synopGMACReadReg(u32 RegBase, u32 RegOffset);
38 void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData);
39 void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos);
40 void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos);
41 bool synopGMACCheckBits(u32 RegBase, u32 RegOffset, u32 BitPos);
A DsynopGMAC_Dev.c80 s32 synopGMAC_read_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 *data) in synopGMAC_read_phy_reg() argument
86 …synopGMACWriteReg(RegBase, GmacGmiiAddr, addr); //write the address from where the data to be read… in synopGMAC_read_phy_reg()
90 if (!(synopGMACReadReg(RegBase, GmacGmiiAddr) & GmiiBusy)) in synopGMAC_read_phy_reg()
97 * data = (u16)(synopGMACReadReg(RegBase, GmacGmiiData) & 0xFFFF); in synopGMAC_read_phy_reg()
115 s32 synopGMAC_write_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 data) in synopGMAC_write_phy_reg() argument
120 …synopGMACWriteReg(RegBase, GmacGmiiData, data); // write the data in to GmacGmiiData register of s… in synopGMAC_write_phy_reg()
126 synopGMACWriteReg(RegBase, GmacGmiiAddr, addr); in synopGMAC_write_phy_reg()
129 if (!(synopGMACReadReg(RegBase, GmacGmiiAddr) & GmiiBusy)) in synopGMAC_write_phy_reg()
/bsp/nuvoton/libraries/m460/rtt_port/emac/
A DsynopGMAC_plat.c19 u32 synopGMACReadReg(u32 RegBase, u32 RegOffset) in synopGMACReadReg() argument
21 u32 addr = RegBase + RegOffset; in synopGMACReadReg()
31 void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData) in synopGMACWriteReg() argument
34 u32 addr = RegBase + (u32)RegOffset; in synopGMACWriteReg()
48 void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos) in synopGMACSetBits() argument
50 u32 data = synopGMACReadReg(RegBase, RegOffset) | BitPos; in synopGMACSetBits()
52 synopGMACWriteReg(RegBase, RegOffset, data); in synopGMACSetBits()
61 void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos) in synopGMACClearBits() argument
65 synopGMACWriteReg(RegBase, RegOffset, data); in synopGMACClearBits()
74 bool synopGMACCheckBits(u32 RegBase, u32 RegOffset, u32 BitPos) in synopGMACCheckBits() argument
[all …]
A DsynopGMAC_plat.h36 u32 synopGMACReadReg(u32 RegBase, u32 RegOffset);
37 void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData);
38 void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos);
39 void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos);
40 bool synopGMACCheckBits(u32 RegBase, u32 RegOffset, u32 BitPos);
A DsynopGMAC_Dev.c80 s32 synopGMAC_read_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 *data) in synopGMAC_read_phy_reg() argument
86 …synopGMACWriteReg(RegBase, GmacGmiiAddr, addr); //write the address from where the data to be read… in synopGMAC_read_phy_reg()
90 if (!(synopGMACReadReg(RegBase, GmacGmiiAddr) & GmiiBusy)) in synopGMAC_read_phy_reg()
97 * data = (u16)(synopGMACReadReg(RegBase, GmacGmiiData) & 0xFFFF); in synopGMAC_read_phy_reg()
115 s32 synopGMAC_write_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 data) in synopGMAC_write_phy_reg() argument
120 …synopGMACWriteReg(RegBase, GmacGmiiData, data); // write the data in to GmacGmiiData register of s… in synopGMAC_write_phy_reg()
126 synopGMACWriteReg(RegBase, GmacGmiiAddr, addr); in synopGMAC_write_phy_reg()
129 if (!(synopGMACReadReg(RegBase, GmacGmiiAddr) & GmiiBusy)) in synopGMAC_write_phy_reg()
A DsynopGMAC_Dev.h1533 s32 synopGMAC_read_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 *data);
1534 s32 synopGMAC_write_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 data);
/bsp/loongson/ls1cdev/drivers/net/
A DsynopGMAC_plat.h143 static u32 synopGMACReadReg(u32 RegBase, u32 RegOffset) in synopGMACReadReg() argument
148 addr = RegBase + (u32)RegOffset; in synopGMACReadReg()
167 static void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData ) in synopGMACWriteReg() argument
172 addr = RegBase + (u32)RegOffset; in synopGMACWriteReg()
192 static void synopGMACSetBits(u32 RegBase, u32 RegOffset, u32 BitPos) in synopGMACSetBits() argument
196 data = synopGMACReadReg(RegBase, RegOffset); in synopGMACSetBits()
198 synopGMACWriteReg(RegBase, RegOffset, data); in synopGMACSetBits()
215 static void synopGMACClearBits(u32 RegBase, u32 RegOffset, u32 BitPos) in synopGMACClearBits() argument
218 data = synopGMACReadReg(RegBase, RegOffset); in synopGMACClearBits()
220 synopGMACWriteReg(RegBase, RegOffset, data); in synopGMACClearBits()
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A DsynopGMAC_Dev.c60 s32 synopGMAC_read_phy_reg(u32 RegBase,u32 PhyBase, u32 RegOffset, u16 * data ) in synopGMAC_read_phy_reg() argument
68 synopGMACWriteReg(RegBase,GmacGmiiAddr,addr); in synopGMAC_read_phy_reg()
73 if (!(synopGMACReadReg(RegBase,GmacGmiiAddr) & GmiiBusy)){ in synopGMAC_read_phy_reg()
79 * data = (u16)(synopGMACReadReg(RegBase,GmacGmiiData) & 0xFFFF); in synopGMAC_read_phy_reg()
101 s32 synopGMAC_write_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 data) in synopGMAC_write_phy_reg() argument
106 …synopGMACWriteReg(RegBase,GmacGmiiData,data); // write the data in to GmacGmiiData register of syn… in synopGMAC_write_phy_reg()
112 synopGMACWriteReg(RegBase,GmacGmiiAddr,addr); in synopGMAC_write_phy_reg()
114 if (!(synopGMACReadReg(RegBase,GmacGmiiAddr) & GmiiBusy)){ in synopGMAC_write_phy_reg()
A DsynopGMAC_Dev.h1570 s32 synopGMAC_read_phy_reg(u32 RegBase,u32 PhyBase, u32 RegOffset, u16 * data);
1571 s32 synopGMAC_write_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 data);
/bsp/loongson/ls2kdev/drivers/net/
A DsynopGMAC_plat.h136 static u32 synopGMACReadReg(u64 RegBase, u32 RegOffset) in synopGMACReadReg() argument
141 addr = RegBase + (u32)RegOffset; in synopGMACReadReg()
160 static void synopGMACWriteReg(u64 RegBase, u32 RegOffset, u32 RegData ) in synopGMACWriteReg() argument
163 addr = RegBase + (u32)RegOffset; in synopGMACWriteReg()
182 static void synopGMACSetBits(u64 RegBase, u32 RegOffset, u32 BitPos) in synopGMACSetBits() argument
186 data = synopGMACReadReg(RegBase, RegOffset); in synopGMACSetBits()
188 synopGMACWriteReg(RegBase, RegOffset, data); in synopGMACSetBits()
205 static void synopGMACClearBits(u64 RegBase, u32 RegOffset, u32 BitPos) in synopGMACClearBits() argument
208 data = synopGMACReadReg(RegBase, RegOffset); in synopGMACClearBits()
210 synopGMACWriteReg(RegBase, RegOffset, data); in synopGMACClearBits()
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A DsynopGMAC_Dev.c60 s32 synopGMAC_read_phy_reg(u64 RegBase, u32 PhyBase, u32 RegOffset, u16 *data) in synopGMAC_read_phy_reg() argument
68 synopGMACWriteReg(RegBase, GmacGmiiAddr, addr); in synopGMAC_read_phy_reg()
74 if (!(synopGMACReadReg(RegBase, GmacGmiiAddr) & GmiiBusy)) in synopGMAC_read_phy_reg()
84 *data = (u16)(synopGMACReadReg(RegBase, GmacGmiiData) & 0xFFFF); in synopGMAC_read_phy_reg()
108 s32 synopGMAC_write_phy_reg(u64 RegBase, u32 PhyBase, u32 RegOffset, u16 data) in synopGMAC_write_phy_reg() argument
113 …synopGMACWriteReg(RegBase, GmacGmiiData, data); // write the data in to GmacGmiiData register of s… in synopGMAC_write_phy_reg()
119 synopGMACWriteReg(RegBase, GmacGmiiAddr, addr); in synopGMAC_write_phy_reg()
122 if (!(synopGMACReadReg(RegBase, GmacGmiiAddr) & GmiiBusy)) in synopGMAC_write_phy_reg()
/bsp/airm2m/air105/libraries/HAL_Driver/Src/
A Dcore_gpio.c25 volatile GPIO_TypeDef *RegBase; member
136 prvGPIO_Resource[Port].RegBase->OEN |= Pin; in GPIO_Config()
141 prvGPIO_Resource[Port].RegBase->OEN &= ~Pin; in GPIO_Config()
152 prvGPIO_Resource[Port].RegBase->OEN |= Pin; in GPIO_ODConfig()
155 prvGPIO_Resource[Port].RegBase->PUE |= Pin; in GPIO_ODConfig()
159 prvGPIO_Resource[Port].RegBase->PUE &= ~Pin; in GPIO_ODConfig()
170 prvGPIO_Resource[Port].RegBase->PUE |= Pin; in GPIO_PullConfig()
174 prvGPIO_Resource[Port].RegBase->PUE &= ~Pin; in GPIO_PullConfig()
230 prvGPIO_Resource[Port].RegBase->PUE |= Pin; in GPIO_Output()
234 prvGPIO_Resource[Port].RegBase->PUE &= ~Pin; in GPIO_Output()
[all …]
A Dcore_uart.c26 const UART_TypeDef *RegBase; member
136 UART_TypeDef* Uart = prvUart[UartID].RegBase; in Uart_BaseInit()
217 UART_TypeDef* Uart = (UART_TypeDef*)prvUart[UartID].RegBase; in Uart_DeInit()
236 UART_TypeDef* Uart = (UART_TypeDef*)prvUart[UartID].RegBase; in Uart_DMATxInit()
250 UART_TypeDef* Uart = (UART_TypeDef*)prvUart[UartID].RegBase; in Uart_DMARxInit()
262 UART_TypeDef* Uart = (UART_TypeDef*)prvUart[UartID].RegBase; in Uart_BlockTx()
277 UART_TypeDef* Uart = (UART_TypeDef*)prvUart[UartID].RegBase; in Uart_NoBlockTx()
287 UART_TypeDef* Uart = (UART_TypeDef*)prvUart[UartID].RegBase; in Uart_EnableRxIrq()
301 UART_TypeDef* Uart = (UART_TypeDef*)prvUart[UartID].RegBase; in Uart_DMATx()
311 UART_TypeDef* Uart = (UART_TypeDef*)prvUart[UartID].RegBase; in Uart_DMARx()
[all …]
A Dcore_dma.c25 DMA_TypeDef *RegBase; member
147 DMA_TypeDef *hwDMA = hwDMAChannal[Stream].RegBase; in DMA_CheckStreamBusy()
171 DMA_TypeDef *hwDMA = hwDMAChannal[Stream].RegBase; in DMA_ConfigStream()
261 DMA_TypeDef *hwDMA = hwDMAChannal[Stream].RegBase; in DMA_ForceStartStream()
300 DMA_TypeDef *hwDMA = hwDMAChannal[Stream].RegBase; in DMA_ClearStreamFlag()
312 DMA_TypeDef *hwDMA = hwDMAChannal[Stream].RegBase; in DMA_StopStream()
329 DMA_TypeDef *hwDMA = hwDMAChannal[Stream].RegBase; in DMA_GetDataLength()
381 DMA_TypeDef *hwDMA = hwDMAChannal[Stream].RegBase; in DMA_PrintReg()
A Dcore_spi.c67 const volatile void *RegBase; member
399 SPI = (SPI_TypeDef *)prvSPI[SpiID].RegBase; in SPI_MasterInit()
584 SPI = (SPI_TypeDef *)prvSPI[SpiID].RegBase; in SPI_Transfer()
639 HSPI = (HSPIM_TypeDef *)prvSPI[SpiID].RegBase; in prvSPI_BlockTransfer()
705 SPI = (SPI_TypeDef *)prvSPI[SpiID].RegBase; in prvSPI_BlockTransfer()
811 HSPI = (HSPIM_TypeDef *)prvSPI[SpiID].RegBase; in prvSPI_FlashBlockTransfer()
871 SPI = (SPI_TypeDef *)prvSPI[SpiID].RegBase; in prvSPI_FlashBlockTransfer()
1006 SPI = (SPI_TypeDef *)prvSPI[SpiID].RegBase; in SPI_DMATxInit()
1037 SPI = (SPI_TypeDef *)prvSPI[SpiID].RegBase; in SPI_DMARxInit()
1071 SPI = (SPI_TypeDef *)prvSPI[SpiID].RegBase; in SPI_TransferStop()
[all …]
A Dcore_i2c.c43 const I2C_TypeDef *RegBase; member
85 I2C_TypeDef *I2C = prvI2C.RegBase; in I2C_IrqHandle()
166 I2C_TypeDef *I2C = prvI2C.RegBase; in I2C_IrqHandleRegQueue()
226 I2C_TypeDef *I2C = prvI2C.RegBase; in I2C_MasterSetup()
254 I2C_TypeDef *I2C = prvI2C.RegBase; in I2C_Prepare()
283 I2C_TypeDef *I2C = prvI2C.RegBase; in I2C_MasterXfer()
353 I2C_TypeDef *I2C = prvI2C.RegBase; in I2C_MasterWriteRegQueue()
447 I2C_TypeDef *I2C = prvI2C.RegBase; in I2C_ForceStop()
A Dcore_keyboard.c26 const I2C_TypeDef *RegBase; member
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_usbfs_driver/inc/
A Dusb_regs.h61 #define RegBase (0x40005C00L) /* USB_IP Peripheral Registers base address */ macro
79 #define USB_CTRL ((__IO unsigned*)(RegBase + 0x40))
81 #define USB_STS ((__IO unsigned*)(RegBase + 0x44))
83 #define USB_FN ((__IO unsigned*)(RegBase + 0x48))
85 #define USB_ADDR ((__IO unsigned*)(RegBase + 0x4C))
87 #define USB_BUFTAB ((__IO unsigned*)(RegBase + 0x50))
91 #define EP0REG ((__IO unsigned*)(RegBase)) /* endpoint 0 register address */
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_usbfs_driver/inc/
A Dusb_regs.h61 #define RegBase (0x40005C00L) /* USB_IP Peripheral Registers base address */ macro
79 #define USB_CTRL ((__IO unsigned*)(RegBase + 0x40))
81 #define USB_STS ((__IO unsigned*)(RegBase + 0x44))
83 #define USB_FN ((__IO unsigned*)(RegBase + 0x48))
85 #define USB_ADDR ((__IO unsigned*)(RegBase + 0x4C))
87 #define USB_BUFTAB ((__IO unsigned*)(RegBase + 0x50))
91 #define EP0REG ((__IO unsigned*)(RegBase)) /* endpoint 0 register address */
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_usbfs_driver/inc/
A Dusb_regs.h61 #define RegBase (0x40005C00L) /* USB_IP Peripheral Registers base address */ macro
79 #define USB_CTRL ((__IO unsigned*)(RegBase + 0x40))
81 #define USB_STS ((__IO unsigned*)(RegBase + 0x44))
83 #define USB_FN ((__IO unsigned*)(RegBase + 0x48))
85 #define USB_ADDR ((__IO unsigned*)(RegBase + 0x4C))
87 #define USB_BUFTAB ((__IO unsigned*)(RegBase + 0x50))
91 #define EP0REG ((__IO unsigned*)(RegBase)) /* endpoint 0 register address */
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_usbfs_driver/inc/
A Dusb_regs.h61 #define RegBase (0x40005C00L) /* USB_IP Peripheral Registers base address */ macro
78 #define USB_CTRL ((__IO unsigned*)(RegBase + 0x40))
80 #define USB_STS ((__IO unsigned*)(RegBase + 0x44))
82 #define USB_FN ((__IO unsigned*)(RegBase + 0x48))
84 #define USB_ADDR ((__IO unsigned*)(RegBase + 0x4C))
86 #define USB_BUFTAB ((__IO unsigned*)(RegBase + 0x50))
90 #define EP0REG ((__IO unsigned*)(RegBase)) /* endpoint 0 register address */
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_usbfs_driver/inc/
A Dusb_regs.h61 #define RegBase (0x40005C00L) /* USB_IP Peripheral Registers base address */ macro
78 #define USB_CTRL ((__IO unsigned*)(RegBase + 0x40))
80 #define USB_STS ((__IO unsigned*)(RegBase + 0x44))
82 #define USB_FN ((__IO unsigned*)(RegBase + 0x48))
84 #define USB_ADDR ((__IO unsigned*)(RegBase + 0x4C))
86 #define USB_BUFTAB ((__IO unsigned*)(RegBase + 0x50))
90 #define EP0REG ((__IO unsigned*)(RegBase)) /* endpoint 0 register address */
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_usbfs_driver/inc/
A Dusb_regs.h61 #define RegBase (0x40005C00L) /* USB_IP Peripheral Registers base address */ macro
78 #define USB_CTRL ((__IO unsigned*)(RegBase + 0x40))
80 #define USB_STS ((__IO unsigned*)(RegBase + 0x44))
82 #define USB_FN ((__IO unsigned*)(RegBase + 0x48))
84 #define USB_ADDR ((__IO unsigned*)(RegBase + 0x4C))
86 #define USB_BUFTAB ((__IO unsigned*)(RegBase + 0x50))
90 #define EP0REG ((__IO unsigned*)(RegBase)) /* endpoint 0 register address */
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_usbfs_driver/inc/
A Dusb_regs.h61 #define RegBase (0x40005C00L) /* USB_IP Peripheral Registers base address */ macro
78 #define USB_CTRL ((__IO unsigned*)(RegBase + 0x40))
80 #define USB_STS ((__IO unsigned*)(RegBase + 0x44))
82 #define USB_FN ((__IO unsigned*)(RegBase + 0x48))
84 #define USB_ADDR ((__IO unsigned*)(RegBase + 0x4C))
86 #define USB_BUFTAB ((__IO unsigned*)(RegBase + 0x50))
90 #define EP0REG ((__IO unsigned*)(RegBase)) /* endpoint 0 register address */

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