| /bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/ |
| A D | core_cm0.h | 312 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
313 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/efm32/Libraries/CMSIS/Include/ |
| A D | core_cm0.h | 310 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
311 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| A D | core_cm0plus.h | 325 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
326 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/CME_M7/CMSIS/CMSIS/Include/ |
| A D | core_cm0.h | 325 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
326 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| A D | core_sc000.h | 333 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
334 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| A D | core_cm0plus.h | 340 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
341 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/ |
| A D | core_cm0.h | 325 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
326 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| A D | core_sc000.h | 333 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
334 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| A D | core_cm0plus.h | 340 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
341 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/mm32l07x/Libraries/CMSIS/CORE/ |
| A D | core_cm0.h | 310 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
311 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_cm0.h | 310 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
311 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/ |
| A D | core_cm0.h | 325 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
326 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/ |
| A D | core_cm0.h | 325 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
326 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_cm0.h | 300 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
301 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/xplorer4330/Libraries/CMSIS/Include/ |
| A D | core_cm0.h | 325 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
326 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/essemi/es32f0654/libraries/CMSIS/Include/ |
| A D | core_cm0.h | 311 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
312 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/ |
| A D | core_cm0.h | 354 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
355 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| A D | core_cm0plus.h | 369 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
370 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ |
| A D | core_cm0.h | 345 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
346 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| A D | core_cm0plus.h | 360 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
361 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/samd21/sam_d2x_asflib/CMSIS/Include/ |
| A D | core_cm0.h | 354 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
355 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0.h | 354 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
355 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0.h | 354 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
355 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0.h | 344 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
345 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
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| /bsp/wch/arm/ch579m/libraries/CMSIS/Include/ |
| A D | core_cm0.h | 354 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB … macro
355 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB …
|