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Searched refs:SCB_CPUID_PARTNO_Pos (Results 1 – 25 of 632) sorted by relevance

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/bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/
A Dcore_cm0.h315 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
316 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/efm32/Libraries/CMSIS/Include/
A Dcore_cm0.h313 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
314 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
A Dcore_cm0plus.h328 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
329 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/CME_M7/CMSIS/CMSIS/Include/
A Dcore_cm0.h328 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
329 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
A Dcore_sc000.h336 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
337 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
A Dcore_cm0plus.h343 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
344 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/
A Dcore_cm0.h328 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
329 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
A Dcore_sc000.h336 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
337 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
A Dcore_cm0plus.h343 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
344 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/mm32l07x/Libraries/CMSIS/CORE/
A Dcore_cm0.h313 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
314 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/
A Dcore_cm0.h313 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
314 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/
A Dcore_cm0.h328 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
329 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/
A Dcore_cm0.h328 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
329 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/
A Dcore_cm0.h303 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
304 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/xplorer4330/Libraries/CMSIS/Include/
A Dcore_cm0.h328 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
329 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/essemi/es32f0654/libraries/CMSIS/Include/
A Dcore_cm0.h314 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
315 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/
A Dcore_cm0.h357 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
358 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
A Dcore_cm0plus.h372 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
373 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dcore_cm0.h348 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
349 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
A Dcore_cm0plus.h363 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
364 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/samd21/sam_d2x_asflib/CMSIS/Include/
A Dcore_cm0.h357 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
358 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h357 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
358 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h357 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
358 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h347 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
348 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …
/bsp/wch/arm/ch579m/libraries/CMSIS/Include/
A Dcore_cm0.h357 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB … macro
358 #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB …

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