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Searched refs:SCB_SCR_SLEEPDEEP (Results 1 – 25 of 27) sorted by relevance

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/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f20x_pwr.c128 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOPMode()
139 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOPMode()
152 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTANDBYMode()
220 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOPMode_RAM()
231 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOPMode_RAM()
259 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOPMode_RAM_LV()
270 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOPMode_RAM_LV()
293 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTANDBYMode_RAM()
322 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTANDBYMode_RAM_LV()
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_pwr.c207 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSLEEPMode()
263 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterStopState()
280 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterStopState()
305 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOP2Mode()
322 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOP2Mode()
337 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterStandbyState()
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_pwr.c207 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSLEEPMode()
263 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterStopState()
280 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterStopState()
305 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOP2Mode()
322 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOP2Mode()
337 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterStandbyState()
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_pwr.c207 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSLEEPMode()
263 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterStopState()
280 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterStopState()
305 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOP2Mode()
322 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOP2Mode()
337 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterStandbyState()
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_pwr.c207 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSLEEPMode()
263 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterStopState()
280 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterStopState()
305 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOP2Mode()
322 SCB->SCR &= (uint32_t) ~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOP2Mode()
337 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterStandbyState()
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f10x_pwr.c129 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOPMode()
140 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOPMode()
153 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTANDBYMode()
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dair32f10x_pwr.c188 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOPMode()
203 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOPMode()
218 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTANDBYMode()
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_pwr.c251 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSLEEPMode()
308 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOP2Mode()
323 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOP2Mode()
424 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTANDBYMode()
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_pwr.c250 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSLEEPMode()
311 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOP2Mode()
328 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOP2Mode()
438 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTANDBYMode()
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_pwr.c253 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSLEEPMode()
318 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTOP2Mode()
335 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); in PWR_EnterSTOP2Mode()
444 SCB->SCR |= SCB_SCR_SLEEPDEEP; in PWR_EnterSTANDBYMode()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_common.h538 #define SCB_SCR_SLEEPDEEP (0x04U) ///< Sleep deep bit macro
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h2229 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h2238 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h2532 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h2298 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/CMSIS/WCH/CH32F10x/Include/
A Dch32f10x.h4122 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32f10x.h4122 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/CMSIS/WCH/CH32F20x/Include/
A Dch32f20x.h4442 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /* Sleep deep bit */ macro
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32f20x.h4442 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /* Sleep deep bit */ macro
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x.h2465 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/n32/libraries/N32WB452_Firmware_Library/CMSIS/device/
A Dn32wb452.h2880 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/n32/libraries/N32L40x_Firmware_Library/CMSIS/device/
A Dn32l40x.h2086 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/n32/libraries/N32L43x_Firmware_Library/CMSIS/device/
A Dn32l43x.h2112 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/n32/libraries/N32G43x_Firmware_Library/CMSIS/device/
A Dn32g43x.h2063 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro
/bsp/n32/libraries/N32G4FR_Firmware_Library/CMSIS/device/
A Dn32g4fr.h2967 #define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ macro

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