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Searched refs:SCB_SCR_SLEEPDEEP_Pos (Results 1 – 25 of 630) sorted by relevance

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/bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/
A Dcore_cm0.h369 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
370 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/efm32/Libraries/CMSIS/Include/
A Dcore_cm0.h367 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
368 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm0plus.h388 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
389 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/CME_M7/CMSIS/CMSIS/Include/
A Dcore_cm0.h382 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
383 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_sc000.h394 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
395 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm0plus.h403 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
404 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/
A Dcore_cm0.h382 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
383 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_sc000.h394 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
395 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm0plus.h403 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
404 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/mm32l07x/Libraries/CMSIS/CORE/
A Dcore_cm0.h367 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
368 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/
A Dcore_cm0.h367 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
368 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/
A Dcore_cm0.h382 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
383 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/
A Dcore_cm0.h382 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
383 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/
A Dcore_cm0.h357 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
358 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/xplorer4330/Libraries/CMSIS/Include/
A Dcore_cm0.h382 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
383 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/essemi/es32f0654/libraries/CMSIS/Include/
A Dcore_cm0.h368 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
369 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/
A Dcore_cm0.h411 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
412 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm0plus.h432 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
433 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dcore_cm0.h402 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
403 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm0plus.h423 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
424 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/samd21/sam_d2x_asflib/CMSIS/Include/
A Dcore_cm0.h411 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
412 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h411 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
412 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h411 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
412 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h401 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
402 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/bsp/wch/arm/ch579m/libraries/CMSIS/Include/
A Dcore_cm0.h411 #define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB … macro
412 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …

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