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Searched refs:SCB_SHCSR_SVCALLPENDED_Pos (Results 1 – 25 of 630) sorted by relevance

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/bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/
A Dcore_sc000.h408 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
409 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
413 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
416 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h396 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
397 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/CME_M7/CMSIS/CMSIS/Include/
A Dcore_sc000.h408 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
409 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
413 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
416 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h396 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
397 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/mm32l07x/Libraries/CMSIS/CORE/
A Dcore_sc000.h408 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
409 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
413 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
416 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h381 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
382 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/
A Dcore_sc000.h408 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
409 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
413 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
416 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h381 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
382 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/
A Dcore_sc000.h408 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
409 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
413 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
416 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h396 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
397 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/
A Dcore_sc000.h408 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
409 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
413 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
416 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h396 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
397 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/
A Dcore_sc000.h398 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
399 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
403 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
406 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h371 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
372 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/xplorer4330/Libraries/CMSIS/Include/
A Dcore_sc000.h408 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
409 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
413 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
416 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h396 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
397 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/efm32/Libraries/CMSIS/Include/
A Dcore_sc000.h393 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
394 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
398 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
401 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
A Dcore_cm0.h381 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
382 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/samd21/sam_d2x_asflib/CMSIS/Include/
A Dcore_sc000.h437 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
438 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
442 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
445 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/
A Dcore_sc000.h437 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
438 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
442 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
445 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/
A Dcore_sc000.h437 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
438 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
442 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
445 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/
A Dcore_sc000.h427 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
428 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
432 #define SCB_SFCR_UNIBRTIMING_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
435 #define SCB_SFCR_SECKEY_Msk (0xFFFFUL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/
A Dcore_cm0.h383 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
384 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/essemi/es32f0654/libraries/CMSIS/Include/
A Dcore_cm0.h382 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
383 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …
/bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/
A Dcore_cm0.h425 #define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB … macro
426 #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB …

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