Searched refs:SCG_LPFLLDIV_LPFLLDIV1_VAL (Results 1 – 1 of 1) sorted by relevance

/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A D	fsl_clock.c	40 #define SCG_LPFLLDIV_LPFLLDIV1_VAL ((SCG->LPFLLDIV & SCG_LPFLLDIV_LPFLLDIV1_MASK) >> SCG_LPFLLDIV_L… macro 780 divider = SCG_LPFLLDIV_LPFLLDIV1_VAL; in CLOCK_GetLpFllAsyncFreq()

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