Home
last modified time | relevance | path

Searched refs:SDIO_BASE (Results 1 – 25 of 30) sorted by relevance

12

/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_sdio.h39 #define SDIO_BASE (0x40018000U) ///< Base Address… macro
95 #define SDIO ((SDIO_TypeDef*) SDIO_BASE)
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f20x_sdio.c12 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
27 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dair32f10x_sdio.c16 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
90 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_sdio.c52 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
126 #define SDID_RESPONSE_ADDR ((uint32_t)(SDIO_BASE + 0x14))
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_sdio.c52 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
126 #define SDID_RESPONSE_ADDR ((uint32_t)(SDIO_BASE + 0x14))
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_sdio.c52 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
126 #define SDID_RESPONSE_ADDR ((uint32_t)(SDIO_BASE + 0x14))
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_sdio.c52 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
126 #define SDID_RESPONSE_ADDR ((uint32_t)(SDIO_BASE + 0x14))
/bsp/rockchip/common/rk_hal/lib/CMSIS/Device/RK2108/Include/
A Dsoc.h147 #define SDIO_BASE MMC_BASE /* 0x40C90000U MMC base address */ macro
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/inc/
A Dapm32e10x_sdio.h50 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/inc/
A Dapm32f10x_sdio.h272 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/src/
A Dapm32f4xx_sdio.c230 tmp = ((uint32_t)(SDIO_BASE + 0x14)) + res; in SDIO_ReadResponse()
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_sdio.c245 tmp = ((uint32_t)(SDIO_BASE + 0x14)) + res; in SDIO_ReadResponse()
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/
A Dapm32f10x_sdio.c242 tmp = ((uint32_t)(SDIO_BASE + 0x14)) + res; in SDIO_ReadResponse()
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_sdmmc.h639 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
/bsp/synwit/libraries/SWM320_CSL/CMSIS/DeviceSupport/
A DSWM320.h3030 #define SDIO_BASE (AHB_BASE + 0x04000) macro
3126 #define SDIO ((SDIO_TypeDef *) SDIO_BASE)
/bsp/synwit/libraries/SWM341_CSL/CMSIS/DeviceSupport/
A DSWM341.h3789 #define SDIO_BASE (AHB_BASE + 0x01800) macro
3952 #define SDIO ((SDIO_TypeDef *) SDIO_BASE)
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/CMSIS/WCH/CH32F20x/Include/
A Dch32f20x.h1015 #define SDIO_BASE (APB2PERIPH_BASE + 0x8000) macro
1116 #define SDIO ((SDIO_TypeDef *) SDIO_BASE)
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32f20x.h1015 #define SDIO_BASE (APB2PERIPH_BASE + 0x8000) macro
1116 #define SDIO ((SDIO_TypeDef *) SDIO_BASE)
/bsp/apm32/libraries/APM32E10x_Library/Device/Geehy/APM32E10x/Include/
A Dapm32e10x.h5909 #define SDIO_BASE (PERIPH_BASE + 0x18000) macro
6008 #define SDIO ((SDIO_T *) SDIO_BASE)
/bsp/apm32/libraries/APM32F10x_Library/Device/Geehy/APM32F10x/Include/
A Dapm32f10x.h6912 #define SDIO_BASE (PERIPH_BASE + 0x18000) macro
7015 #define SDIO ((SDIO_T *) SDIO_BASE)
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x.h964 #define SDIO_BASE (PERIPH_BASE + 0x18000) macro
1094 #define SDIO ((SDIO_TypeDef *) SDIO_BASE)
/bsp/apm32/libraries/APM32F4xx_Library/Device/Geehy/APM32F4xx/Include/
A Dapm32f4xx.h7238 #define SDIO_BASE (APB2PERIPH_BASE + 0x2C00) macro
7361 #define SDIO ((SDIO_T *) SDIO_BASE)
/bsp/n32/libraries/N32WB452_Firmware_Library/CMSIS/device/
A Dn32wb452.h1026 #define SDIO_BASE (AHBPERIPH_BASE + 0x0000) macro
1098 #define SDIO ((SDIO_Module*)SDIO_BASE)
/bsp/n32/libraries/N32G4FR_Firmware_Library/CMSIS/device/
A Dn32g4fr.h1105 #define SDIO_BASE (AHBPERIPH_BASE + 0x0000) macro
1179 #define SDIO ((SDIO_Module*)SDIO_BASE)
/bsp/n32/libraries/N32G45x_Firmware_Library/CMSIS/device/
A Dn32g45x.h1223 #define SDIO_BASE (AHBPERIPH_BASE + 0x0000) macro
1308 #define SDIO ((SDIO_Module*)SDIO_BASE)

Completed in 947 milliseconds

12