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Searched refs:SDMMC_DATA_BUFFER_ALIGN_CAHCE (Results 1 – 3 of 3) sorted by relevance

/bsp/rv32m1_vega/rv32m1_sdk_riscv/sdmmc_2.1.2/inc/
A Dfsl_host.h39 #define SDMMC_DATA_BUFFER_ALIGN_CAHCE MAX(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE, FSL_FEATURE_L2DCACHE_… macro
41 #define SDMMC_DATA_BUFFER_ALIGN_CAHCE FSL_FEATURE_L1DCACHE_LINESIZE_BYTE macro
44 #define SDMMC_DATA_BUFFER_ALIGN_CAHCE 1 macro
47 #define SDMMC_DATA_BUFFER_ALIGN_CAHCE 1 macro
/bsp/rv32m1_vega/rv32m1_sdk_riscv/sdmmc_2.1.2/src/
A Dfsl_sdmmc.c15 SDK_ALIGN(uint32_t g_sdmmc[SDK_SIZEALIGN(SDMMC_GLOBAL_BUFFER_SIZE, SDMMC_DATA_BUFFER_ALIGN_CAHCE)],
16 MAX(SDMMC_DATA_BUFFER_ALIGN_CAHCE, HOST_DMA_BUFFER_ADDR_ALIGN));
A Dfsl_sd.c303 extern uint32_t g_sdmmc[SDK_SIZEALIGN(SDMMC_GLOBAL_BUFFER_SIZE, SDMMC_DATA_BUFFER_ALIGN_CAHCE)];

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