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Searched refs:SDRAM_BANK_ADDR (Results 1 – 25 of 36) sorted by relevance

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/bsp/apm32/apm32e103ze-evalboard/board/ports/
A Ddrv_sdram.c174 …LOG_D("sdram init success, mapped at 0x%X, size is %d bytes, data width is %d", SDRAM_BANK_ADDR, S… in SDRAM_Init()
178 rt_memheap_init(&system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE); in SDRAM_Init()
208 *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)(i % 100); in sdram_test()
210 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)(i % 1000); in sdram_test()
212 *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)(i % 1000); in sdram_test()
224 data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
231 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
238 data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
A Ddrv_sdram.h18 #define SDRAM_BANK_ADDR ((uint32_t)0x60000000) macro
/bsp/apm32/libraries/Drivers/drv_sdram/APM32E1/
A Ddrv_sdram.c174 …LOG_D("sdram init success, mapped at 0x%X, size is %d bytes, data width is %d", SDRAM_BANK_ADDR, S… in SDRAM_Init()
178 rt_memheap_init(&system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE); in SDRAM_Init()
208 *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)(i % 100); in sdram_test()
210 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)(i % 1000); in sdram_test()
212 *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)(i % 1000); in sdram_test()
224 data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
231 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
238 data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
A Ddrv_sdram.h18 #define SDRAM_BANK_ADDR ((uint32_t)0x60000000) macro
/bsp/stm32/libraries/HAL_Drivers/drivers/
A Ddrv_sdram.c182 …m init success, mapped at 0x%X, size is %d bytes, data width is %d", SDRAM_BANK_ADDR, SDRAM_SIZE, … in SDRAM_Init()
185 rt_memheap_init(&system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE); in SDRAM_Init()
216 *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)(i % 100); in sdram_test()
218 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)(i % 1000); in sdram_test()
220 *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)(i % 1000); in sdram_test()
232 data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
239 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
246 data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
/bsp/hc32/tests/
A Dtest_sdram.c46 *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)(i % 100); in sdram_8bit_test()
56 data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_8bit_test()
89 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)(i % 1000); in sdram_16bit_test()
99 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_16bit_test()
132 *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)(i % 10000); in sdram_32bit_test()
142 data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_32bit_test()
/bsp/apm32/apm32f407zg-evalboard/board/ports/
A Ddrv_sdram.c162 …LOG_D("sdram init success, mapped at 0x%X, size is %d bytes, data width is %d", SDRAM_BANK_ADDR, S… in SDRAM_Init()
166 rt_memheap_init(&system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE); in SDRAM_Init()
196 *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)(i % 100); in sdram_test()
198 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)(i % 1000); in sdram_test()
200 *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)(i % 1000); in sdram_test()
212 data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
219 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
226 data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
A Ddrv_sdram.h18 #define SDRAM_BANK_ADDR ((uint32_t)0x60000000) macro
/bsp/apm32/libraries/Drivers/drv_sdram/APM32F4/
A Ddrv_sdram.c162 …LOG_D("sdram init success, mapped at 0x%X, size is %d bytes, data width is %d", SDRAM_BANK_ADDR, S… in SDRAM_Init()
166 rt_memheap_init(&system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE); in SDRAM_Init()
196 *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)(i % 100); in sdram_test()
198 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)(i % 1000); in sdram_test()
200 *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)(i % 1000); in sdram_test()
212 data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
219 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
226 data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
A Ddrv_sdram.h18 #define SDRAM_BANK_ADDR ((uint32_t)0x60000000) macro
/bsp/hc32/libraries/hc32_drivers/
A Ddrv_sdram.c155 stcCsConfig.u32AddrMatch = (SDRAM_BANK_ADDR >> 24); in _sdram_init()
211 rt_memheap_init(&_system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE); in rt_hw_sdram_init()
239 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)(i % 1000); in _sdram_test()
241 *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)(i % 1000); in _sdram_test()
253 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in _sdram_test()
260 data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width); in _sdram_test()
/bsp/gd32/arm/libraries/gd32_drivers/
A Ddrv_sdram.c245 …m init success, mapped at 0x%X, size is %d bytes, data width is %d", SDRAM_BANK_ADDR, SDRAM_SIZE, … in SDRAM_Init()
248 rt_memheap_init(&system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE); in SDRAM_Init()
279 *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)0x55; in sdram_test()
281 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)0x5555; in sdram_test()
283 *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint32_t)0x55555555; in sdram_test()
295 data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
302 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
309 data = *(__IO uint32_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_test()
/bsp/nxp/imx/imxrt/libraries/drivers/
A Ddrv_sdram.c54 sdramconfig.address = SDRAM_BANK_ADDR; in rt_hw_sdram_init()
81 … LOG_I("sdram init success, mapped at 0x%X, size is %d Kbytes.", SDRAM_BANK_ADDR, SDRAM_SIZE); in rt_hw_sdram_init()
90 rt_memheap_init(&system_heap, "sdram", (void *)(SDRAM_BANK_ADDR + (SDRAM_SIZE * 1024)/2), in rt_hw_sdram_init()
111 rt_uint32_t *sdram = (rt_uint32_t *)SDRAM_BANK_ADDR; /* SDRAM start address. */ in sdram_test()
/bsp/at32/libraries/rt_drivers/
A Ddrv_sdram.c183 rt_memheap_init(&system_heap, "sdram", (void *)SDRAM_BANK_ADDR, SDRAM_SIZE); in sdram_init()
214 *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint8_t)(i % 100); in sdram_sample()
216 *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width) = (uint16_t)(i % 1000); in sdram_sample()
228 data = *(__IO uint8_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_sample()
235 data = *(__IO uint16_t *)(SDRAM_BANK_ADDR + i * data_width); in sdram_sample()
/bsp/nxp/imx/imxrt/imxrt1052-atk-commander/board/ports/
A Dsdram_port.h17 #define SDRAM_BANK_ADDR ((uint32_t)0x80000000U) macro
/bsp/nxp/imx/imxrt/imxrt1052-nxp-evk/board/ports/
A Dsdram_port.h17 #define SDRAM_BANK_ADDR ((uint32_t)0x80000000U) macro
/bsp/nxp/imx/imxrt/imxrt1052-seeed-ArchMix/board/ports/
A Dsdram_port.h17 #define SDRAM_BANK_ADDR ((uint32_t)0x80000000U) macro
/bsp/nxp/imx/imxrt/imxrt1060-nxp-evk/board/ports/
A Dsdram_port.h17 #define SDRAM_BANK_ADDR ((uint32_t)0x80000000U) macro
/bsp/nxp/imx/imxrt/imxrt1064-nxp-evk/board/ports/
A Dsdram_port.h17 #define SDRAM_BANK_ADDR ((uint32_t)0x80000000U) macro
/bsp/nxp/imx/imxrt/imxrt1170-nxp-evk/board/ports/
A Dsdram_port.h18 #define SDRAM_BANK_ADDR ((uint32_t)0x80000000U) macro
/bsp/stm32/stm32h743-atk-apollo/board/ports/
A Dsdram_port.h18 #define SDRAM_BANK_ADDR ((uint32_t)0XC0000000) macro
/bsp/stm32/stm32h750-artpi/board/port/
A Dsdram_port.h18 #define SDRAM_BANK_ADDR ((uint32_t)0XC0000000) macro
/bsp/stm32/stm32f746-st-disco/board/ports/
A Dsdram_port.h18 #define SDRAM_BANK_ADDR ((uint32_t)0XC0000000) macro
/bsp/stm32/stm32f767-atk-apollo/board/ports/
A Dsdram_port.h18 #define SDRAM_BANK_ADDR ((uint32_t)0XC0000000) macro
/bsp/stm32/stm32f767-fire-challenger-v1/board/ports/
A Dsdram_port.h18 #define SDRAM_BANK_ADDR ((uint32_t)0XD0000000) macro

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