Home
last modified time | relevance | path

Searched refs:SERCOM4_GCLK_ID_CORE (Results 1 – 7 of 7) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/instance/
A Dsercom4.h130 #define SERCOM4_GCLK_ID_CORE 17 macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/instance/
A Dsercom4.h139 #define SERCOM4_GCLK_ID_CORE 24 // Index of Generic Clock for Core macro
/bsp/microchip/samc21/bsp/samc21/include/instance/
A Dsercom4.h127 #define SERCOM4_GCLK_ID_CORE 23 macro
/bsp/microchip/samc21/bsp/
A Ddriver_init.c110 …hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM4_GCLK_ID_CORE, CONF_GCLK_SERCOM4_CORE_SRC | (1 << GCLK_PCH… in TARGET_IO_CLOCK_init()
/bsp/microchip/same54/bsp/include/instance/
A Dsercom4.h145 #define SERCOM4_GCLK_ID_CORE 34 macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/instance/
A Dsercom4.h145 #define SERCOM4_GCLK_ID_CORE 34 macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/instance/
A Dsercom4.h145 #define SERCOM4_GCLK_ID_CORE 34 macro

Completed in 10 milliseconds