| /bsp/samd21/sam_d2x_asflib/sam0/drivers/sercom/i2c/ |
| A D | i2c_master.h | 497 i2c_module->CTRLA.reg |= SERCOM_I2CM_CTRLA_ENABLE; in i2c_master_enable()
545 i2c_module->CTRLA.reg &= ~SERCOM_I2CM_CTRLA_ENABLE; in i2c_master_disable()
|
| /bsp/samd21/sam_d2x_asflib/sam0/drivers/sercom/i2c/i2c_samd20/ |
| A D | i2c_master.c | 214 if (i2c_module->CTRLA.reg & SERCOM_I2CM_CTRLA_ENABLE) { in i2c_master_init()
|
| /bsp/samd21/sam_d2x_asflib/sam0/drivers/sercom/i2c/i2c_sam0/ |
| A D | i2c_master.c | 291 if (i2c_module->CTRLA.reg & SERCOM_I2CM_CTRLA_ENABLE) { in i2c_master_init()
|
| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/ |
| A D | sercom.h | 87 #define SERCOM_I2CM_CTRLA_ENABLE (0x1ul << SERCOM_I2CM_CTRLA_ENABLE_Pos) macro
|
| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/ |
| A D | sercom.h | 88 #define SERCOM_I2CM_CTRLA_ENABLE (0x1ul << SERCOM_I2CM_CTRLA_ENABLE_Pos) macro
|
| /bsp/microchip/samc21/bsp/samc21/include/component/ |
| A D | sercom.h | 74 #define SERCOM_I2CM_CTRLA_ENABLE (_U_(0x1) << SERCOM_I2CM_CTRLA_ENABLE_Pos) macro
|
| /bsp/microchip/same54/bsp/include/component/ |
| A D | sercom.h | 74 #define SERCOM_I2CM_CTRLA_ENABLE (_U_(0x1) << SERCOM_I2CM_CTRLA_ENABLE_Pos) macro
|
| /bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/ |
| A D | sercom.h | 74 #define SERCOM_I2CM_CTRLA_ENABLE (_U_(0x1) << SERCOM_I2CM_CTRLA_ENABLE_Pos) macro
|
| /bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/ |
| A D | sercom.h | 74 #define SERCOM_I2CM_CTRLA_ENABLE (_U_(0x1) << SERCOM_I2CM_CTRLA_ENABLE_Pos) macro
|
| /bsp/microchip/saml10/bsp/include/component/ |
| A D | sercom.h | 79 #define SERCOM_I2CM_CTRLA_ENABLE SERCOM_I2CM_CTRLA_ENABLE_Msk /**< \de… macro
|
| /bsp/microchip/samc21/bsp/hri/ |
| A D | hri_sercom_c21.h | 1300 ((Sercom *)hw)->I2CM.CTRLA.reg |= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_set_CTRLA_ENABLE_bit()
1310 tmp = (tmp & SERCOM_I2CM_CTRLA_ENABLE) >> SERCOM_I2CM_CTRLA_ENABLE_Pos; in hri_sercomi2cm_get_CTRLA_ENABLE_bit()
1319 tmp &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_write_CTRLA_ENABLE_bit()
1329 ((Sercom *)hw)->I2CM.CTRLA.reg &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_clear_CTRLA_ENABLE_bit()
1337 ((Sercom *)hw)->I2CM.CTRLA.reg ^= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_toggle_CTRLA_ENABLE_bit()
|
| /bsp/microchip/saml10/bsp/hri/ |
| A D | hri_sercom_l10.h | 1322 ((Sercom *)hw)->I2CM.CTRLA.reg |= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_set_CTRLA_ENABLE_bit()
1332 tmp = (tmp & SERCOM_I2CM_CTRLA_ENABLE) >> SERCOM_I2CM_CTRLA_ENABLE_Pos; in hri_sercomi2cm_get_CTRLA_ENABLE_bit()
1341 tmp &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_write_CTRLA_ENABLE_bit()
1351 ((Sercom *)hw)->I2CM.CTRLA.reg &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_clear_CTRLA_ENABLE_bit()
1359 ((Sercom *)hw)->I2CM.CTRLA.reg ^= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_toggle_CTRLA_ENABLE_bit()
|
| /bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/ |
| A D | hri_sercom_d51.h | 1348 ((Sercom *)hw)->I2CM.CTRLA.reg |= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_set_CTRLA_ENABLE_bit()
1358 tmp = (tmp & SERCOM_I2CM_CTRLA_ENABLE) >> SERCOM_I2CM_CTRLA_ENABLE_Pos; in hri_sercomi2cm_get_CTRLA_ENABLE_bit()
1367 tmp &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_write_CTRLA_ENABLE_bit()
1377 ((Sercom *)hw)->I2CM.CTRLA.reg &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_clear_CTRLA_ENABLE_bit()
1385 ((Sercom *)hw)->I2CM.CTRLA.reg ^= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_toggle_CTRLA_ENABLE_bit()
|
| /bsp/microchip/same54/bsp/hri/ |
| A D | hri_sercom_e54.h | 1348 ((Sercom *)hw)->I2CM.CTRLA.reg |= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_set_CTRLA_ENABLE_bit()
1358 tmp = (tmp & SERCOM_I2CM_CTRLA_ENABLE) >> SERCOM_I2CM_CTRLA_ENABLE_Pos; in hri_sercomi2cm_get_CTRLA_ENABLE_bit()
1367 tmp &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_write_CTRLA_ENABLE_bit()
1377 ((Sercom *)hw)->I2CM.CTRLA.reg &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_clear_CTRLA_ENABLE_bit()
1385 ((Sercom *)hw)->I2CM.CTRLA.reg ^= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_toggle_CTRLA_ENABLE_bit()
|
| /bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/ |
| A D | hri_sercom_d51.h | 1348 ((Sercom *)hw)->I2CM.CTRLA.reg |= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_set_CTRLA_ENABLE_bit()
1358 tmp = (tmp & SERCOM_I2CM_CTRLA_ENABLE) >> SERCOM_I2CM_CTRLA_ENABLE_Pos; in hri_sercomi2cm_get_CTRLA_ENABLE_bit()
1367 tmp &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_write_CTRLA_ENABLE_bit()
1377 ((Sercom *)hw)->I2CM.CTRLA.reg &= ~SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_clear_CTRLA_ENABLE_bit()
1385 ((Sercom *)hw)->I2CM.CTRLA.reg ^= SERCOM_I2CM_CTRLA_ENABLE; in hri_sercomi2cm_toggle_CTRLA_ENABLE_bit()
|
| /bsp/microchip/samd51-adafruit-metro-m4/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 1606 if (hri_sercomi2cm_get_CTRLA_reg(hw, SERCOM_I2CM_CTRLA_ENABLE)) { in _i2c_m_sync_init_impl()
|
| /bsp/microchip/samc21/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 1662 if (hri_sercomi2cm_get_CTRLA_reg(hw, SERCOM_I2CM_CTRLA_ENABLE)) { in _i2c_m_sync_init_impl()
|
| /bsp/microchip/samd51-seeed-wio-terminal/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 1606 if (hri_sercomi2cm_get_CTRLA_reg(hw, SERCOM_I2CM_CTRLA_ENABLE)) { in _i2c_m_sync_init_impl()
|
| /bsp/microchip/saml10/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 1606 if (hri_sercomi2cm_get_CTRLA_reg(hw, SERCOM_I2CM_CTRLA_ENABLE)) { in _i2c_m_sync_init_impl()
|
| /bsp/microchip/same54/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 1679 if (hri_sercomi2cm_get_CTRLA_reg(hw, SERCOM_I2CM_CTRLA_ENABLE)) { in _i2c_m_sync_init_impl()
|