Searched refs:SERCOM_I2CM_CTRLA_SWRST (Results 1 – 19 of 19) sorted by relevance
219 if (i2c_module->CTRLA.reg & SERCOM_I2CM_CTRLA_SWRST) { in i2c_master_init()278 i2c_module->CTRLA.reg = SERCOM_I2CM_CTRLA_SWRST; in i2c_master_reset()
296 if (i2c_module->CTRLA.reg & SERCOM_I2CM_CTRLA_SWRST) { in i2c_master_init()355 i2c_module->CTRLA.reg = SERCOM_I2CM_CTRLA_SWRST; in i2c_master_reset()
85 #define SERCOM_I2CM_CTRLA_SWRST (0x1ul << SERCOM_I2CM_CTRLA_SWRST_Pos) macro
86 #define SERCOM_I2CM_CTRLA_SWRST (0x1ul << SERCOM_I2CM_CTRLA_SWRST_Pos) macro
72 #define SERCOM_I2CM_CTRLA_SWRST (_U_(0x1) << SERCOM_I2CM_CTRLA_SWRST_Pos) macro
76 #define SERCOM_I2CM_CTRLA_SWRST SERCOM_I2CM_CTRLA_SWRST_Msk /**< \de… macro
1610 hri_sercomi2cm_write_CTRLA_reg(hw, SERCOM_I2CM_CTRLA_SWRST | mode); in _i2c_m_sync_init_impl()
1666 hri_sercomi2cm_write_CTRLA_reg(hw, SERCOM_I2CM_CTRLA_SWRST | mode); in _i2c_m_sync_init_impl()
1683 hri_sercomi2cm_write_CTRLA_reg(hw, SERCOM_I2CM_CTRLA_SWRST | mode); in _i2c_m_sync_init_impl()
1283 ((Sercom *)hw)->I2CM.CTRLA.reg |= SERCOM_I2CM_CTRLA_SWRST; in hri_sercomi2cm_set_CTRLA_SWRST_bit()1293 tmp = (tmp & SERCOM_I2CM_CTRLA_SWRST) >> SERCOM_I2CM_CTRLA_SWRST_Pos; in hri_sercomi2cm_get_CTRLA_SWRST_bit()
1305 ((Sercom *)hw)->I2CM.CTRLA.reg |= SERCOM_I2CM_CTRLA_SWRST; in hri_sercomi2cm_set_CTRLA_SWRST_bit()1315 tmp = (tmp & SERCOM_I2CM_CTRLA_SWRST) >> SERCOM_I2CM_CTRLA_SWRST_Pos; in hri_sercomi2cm_get_CTRLA_SWRST_bit()
1331 ((Sercom *)hw)->I2CM.CTRLA.reg |= SERCOM_I2CM_CTRLA_SWRST; in hri_sercomi2cm_set_CTRLA_SWRST_bit()1341 tmp = (tmp & SERCOM_I2CM_CTRLA_SWRST) >> SERCOM_I2CM_CTRLA_SWRST_Pos; in hri_sercomi2cm_get_CTRLA_SWRST_bit()
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