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Searched refs:SPI_FIFO_CTL_REG (Results 1 – 2 of 2) sorted by relevance

/bsp/allwinner/libraries/sunxi-hal/hal/source/spi/
A Dhal_spi.c367 uint32_t reg_val = hal_readl(sspi->base + SPI_FIFO_CTL_REG); in spi_enable_dma_irq()
371 hal_writel(reg_val, sspi->base + SPI_FIFO_CTL_REG); in spi_enable_dma_irq()
377 uint32_t reg_val = hal_readl(sspi->base + SPI_FIFO_CTL_REG); in spi_disable_dma_irq()
381 hal_writel(reg_val, sspi->base + SPI_FIFO_CTL_REG); in spi_disable_dma_irq()
426 uint32_t reg_val = hal_readl(sspi->base + SPI_FIFO_CTL_REG); in spi_reset_fifo()
432 hal_writel(reg_val, sspi->base + SPI_FIFO_CTL_REG); in spi_reset_fifo()
437 uint32_t reg_val = hal_readl(sspi->base + SPI_FIFO_CTL_REG); in spi_set_rx_trig()
441 hal_writel(reg_val, sspi->base + SPI_FIFO_CTL_REG); in spi_set_rx_trig()
446 uint32_t reg_val = hal_readl(sspi->base + SPI_FIFO_CTL_REG); in spi_set_tx_trig()
450 hal_writel(reg_val, sspi->base + SPI_FIFO_CTL_REG); in spi_set_tx_trig()
A Dcommon_spi.h60 #define SPI_FIFO_CTL_REG (0x18) /* fifo control register */ macro

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