| /bsp/cvitek/cv18xx_risc-v/ |
| A D | link.lds | 23 . = ORIGIN(SRAM) ;
32 } > SRAM
70 } > SRAM
76 } > SRAM
96 } > SRAM
105 } > SRAM
113 } > SRAM
126 } > SRAM
135 } > SRAM
146 } > SRAM
[all …]
|
| /bsp/k230/ |
| A D | link.lds | 28 . = ORIGIN(SRAM) ;
31 __sram_base = ORIGIN(SRAM);
32 __sram_size = LENGTH(SRAM);
38 } > SRAM
76 } > SRAM
82 } > SRAM
102 } > SRAM
115 } > SRAM
124 } > SRAM
135 } > SRAM
[all …]
|
| /bsp/allwinner/d1/ |
| A D | link.lds | 24 SRAM : ORIGIN = 0x45000000, LENGTH = 0x7FF000
37 } > SRAM
75 } > SRAM
81 } > SRAM
99 } > SRAM
108 } > SRAM
116 } > SRAM
129 } > SRAM
138 } > SRAM
149 } > SRAM
[all …]
|
| /bsp/bouffalo_lab/bl808/d0/board/linker_scripts/ |
| A D | link.lds | 24 SRAM : ORIGIN = 0x50100000, LENGTH = 63M
37 } > SRAM
75 } > SRAM
81 } > SRAM
101 } > SRAM
110 } > SRAM
118 } > SRAM
131 } > SRAM
140 } > SRAM
151 } > SRAM
[all …]
|
| /bsp/allwinner/d1s/ |
| A D | link.lds | 24 SRAM : ORIGIN = 0x40400000, LENGTH = 60M
37 } > SRAM
75 } > SRAM
81 } > SRAM
101 } > SRAM
110 } > SRAM
118 } > SRAM
131 } > SRAM
140 } > SRAM
151 } > SRAM
[all …]
|
| /bsp/thead-smart/ |
| A D | gcc_csky.ld | 25 I-SRAM : ORIGIN = 0x0 , LENGTH = 0x40000 /* I-SRAM 256KB */
26 D-SRAM : ORIGIN = 0x20000000 , LENGTH = 0xc0000 /* D-SRAM 768KB */
27 O-SRAM : ORIGIN = 0x50000000 , LENGTH = 0x800000 /* off-chip SRAM 8MB */
28 SRAM : ORIGIN = 0x60000000 , LENGTH = 0x20000 /* on-chip SRAM 128KB */
34 REGION_ALIAS("REGION_TEXT", I-SRAM);
35 REGION_ALIAS("REGION_RODATA", I-SRAM);
36 REGION_ALIAS("REGION_CUSTOM1", D-SRAM);
37 REGION_ALIAS("REGION_CUSTOM2", D-SRAM);
38 REGION_ALIAS("REGION_DATA", D-SRAM);
39 REGION_ALIAS("REGION_BSS", D-SRAM);
|
| /bsp/qemu-virt64-riscv/ |
| A D | link.lds | 23 SRAM : ORIGIN = 0x80200000, LENGTH = 0x1000000
36 } > SRAM
74 } > SRAM
80 } > SRAM
81 .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
100 } > SRAM
109 } > SRAM
117 } > SRAM
130 } > SRAM
139 } > SRAM
[all …]
|
| A D | link_smart.lds | 23 SRAM : ORIGIN = 0xFFFFFFC000200000, LENGTH = 0x1000000 - 0x200000
37 } > SRAM
75 } > SRAM
81 } > SRAM
82 .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
101 } > SRAM
110 } > SRAM
118 } > SRAM
131 } > SRAM
140 } > SRAM
[all …]
|
| /bsp/ultrarisc/ur_dp1000_evb/ |
| A D | link.lds | 23 SRAM : ORIGIN = 0x80200000, LENGTH = 0x1000000
36 } > SRAM
74 } > SRAM
80 } > SRAM
81 .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
100 } > SRAM
109 } > SRAM
117 } > SRAM
130 } > SRAM
139 } > SRAM
[all …]
|
| A D | link_smart.lds | 23 SRAM : ORIGIN = 0xFFFFFFC000200000, LENGTH = 0x1000000 - 0x200000
36 } > SRAM
74 } > SRAM
80 } > SRAM
81 .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
100 } > SRAM
109 } > SRAM
117 } > SRAM
130 } > SRAM
139 } > SRAM
[all …]
|
| /bsp/essemi/es32vf2264/drivers/ |
| A D | es32vf2264.ld | 13 I-SRAM : ORIGIN = 0x00000000 , LENGTH = 0x40000 /* I-SRAM 256KB */
14 D-SRAM : ORIGIN = 0x20000000 , LENGTH = 0x8000 /* D-SRAM 32KB */
15 O-SRAM : ORIGIN = 0x50000000 , LENGTH = 0x800000 /* off-chip SRAM 8MB */
16 SRAM : ORIGIN = 0x60000000 , LENGTH = 0x20000 /* on-chip SRAM 128KB */
24 REGION_ALIAS("REGION_TEXT", I-SRAM);
25 REGION_ALIAS("REGION_RODATA", I-SRAM);
26 REGION_ALIAS("REGION_DATA", D-SRAM);
27 REGION_ALIAS("REGION_BSS", D-SRAM);
|
| /bsp/maxim/libraries/MAX32660PeriphDriver/CMSIS/Device/Maxim/MAX32660/Source/GCC/ |
| A D | max32660_sbl.ld | 150 } > SRAM
166 } > SRAM
178 } > SRAM
186 __region_end_ram = (ORIGIN(SRAM) + LENGTH(SRAM));
192 } >SRAM=0
202 } >SRAM=0
213 } >SRAM=0
231 } >SRAM
238 } >SRAM
250 } >SRAM
[all …]
|
| A D | max32660_emulator_ram.ld | 39 SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00018000
56 } > SRAM
65 } > SRAM
71 *(.spix_config*) /* SPIX configuration functions need to be run from SRAM */
96 } > SRAM AT>SRAM
106 } > SRAM
110 __StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
119 } > SRAM
126 } > SRAM
|
| A D | max32660_ram.ld | 39 SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00018000
57 } > SRAM
66 } > SRAM
72 *(.spix_config*) /* SPIX configuration functions need to be run from SRAM */
96 } > SRAM AT>SRAM
106 } > SRAM
110 __StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
119 } > SRAM
126 } > SRAM
|
| /bsp/juicevm/ |
| A D | link.lds | 20 /* 300M SRAM */
21 SRAM : ORIGIN = 0x80000000, LENGTH = 0x12c00000
34 } > SRAM
72 } > SRAM
78 } > SRAM
79 .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
96 } > SRAM
107 } > SRAM
116 } > SRAM
125 } > SRAM
|
| /bsp/k210/ |
| A D | link.lds | 20 /* 6M SRAM */
21 SRAM : ORIGIN = 0x80000000, LENGTH = 0x600000
34 } > SRAM
91 } > SRAM
97 } > SRAM
98 .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
121 } > SRAM
135 } > SRAM
144 } > SRAM
153 } > SRAM
|
| /bsp/maxim/max32660-evsys/board/linker_scripts/ |
| A D | link.lds | 5 SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
65 *(.spix_config*) /* SPIX configuration functions need to be run from SRAM */
89 } > SRAM AT>FLASH
99 } > SRAM
103 __StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
112 } > SRAM
119 } > SRAM
|
| /bsp/at91/at91sam9260/link_scripts/ |
| A D | at91sam9260_ram.icf | 17 // Define a region for the on-chip SRAM.
19 define region SRAM = mem:[from 0x20800000 to 0x23FFFFFF];
45 // Place the RAM vector table at the start of SRAM.
47 place at start of SRAM { section VTABLE };
50 // Place all read/write items into SRAM.
52 place in SRAM { readwrite};
|
| /bsp/at91/at91sam9g45/link_scripts/ |
| A D | at91sam9g45_ram.icf | 17 // Define a region for the on-chip SRAM.
19 define region SRAM = mem:[from 0x70800000 to 0x73FFFFFF];
45 // Place the RAM vector table at the start of SRAM.
47 place at start of SRAM { section VTABLE };
50 // Place all read/write items into SRAM.
52 place in SRAM { readwrite};
|
| /bsp/asm9260t/link_scripts/ |
| A D | sdram.icf | 17 // Define a region for the on-chip SRAM. size = 30MB
19 define region SRAM = mem:[from 0x20200000 to 0x21FFFFFF];
45 // Place the RAM vector table at the start of SRAM.
47 place at start of SRAM { section VTABLE };
50 // Place all read/write items into SRAM.
52 place in SRAM { readwrite};
|
| /bsp/asm9260t/IAR_ASM9260T_DeviceSupportFile/arm/config/linker/AlphaScale/sam9260t/ |
| A D | sam9260t_sdram.icf | 18 // Define a region for the on-chip SRAM. size = 30MB
20 define region SRAM = mem:[from 0x20200000 to 0x21FFFFFF];
46 // Place the RAM vector table at the start of SRAM.
48 place at start of SRAM { section VTABLE };
51 // Place all read/write items into SRAM.
53 place in SRAM { readwrite};
|
| /bsp/nxp/lpc/lpc5410x/ |
| A D | rtthread-lpc5410x.ld | 3 * - Up to 96 kB main SRAM.
4 * - An additional 8 kB SRAM. with GNU ld
14 SRAM (rwx) : ORIGIN = 0x02000000, LENGTH = 96K
68 } > SRAM
76 } > SRAM
|
| /bsp/Infineon/libraries/templates/XMC7200D/board/linker_scripts/ |
| A D | link.icf | 41 define symbol sram_private_for_srom = 0x00000800; /* Private SRAM for SROM (e.g. API pr…
116 /* SRAM reservations */
140 define region SRAM = mem:[from _base_SRAM size _size_…
168 /* Link location specific assignment of 'readonly' type sections to either SRAM or CODE_FLASH */
174 place in SRAM { readwrite };
175 place in SRAM { block CY_SHAREDMEM };
176 place at end of SRAM { block HEAP_STACK };
181 …llowing definitions ensure that SRAM will not be touched at all by startup ECC initialization when…
183 * the area of SRAM where "ROM type" sections are linked to
185 define exported symbol __ecc_init_sram_start_address = start(SRAM);
[all …]
|
| /bsp/Infineon/libraries/templates/XMC7200D/libs/TARGET_APP_KIT_XMC72_EVK/COMPONENT_CM7/TOOLCHAIN_IAR/ |
| A D | linker.icf | 41 define symbol sram_private_for_srom = 0x00000800; /* Private SRAM for SROM (e.g. API pr…
116 /* SRAM reservations */
140 define region SRAM = mem:[from _base_SRAM size _size_…
168 /* Link location specific assignment of 'readonly' type sections to either SRAM or CODE_FLASH */
174 place in SRAM { readwrite };
175 place in SRAM { block CY_SHAREDMEM };
176 place at end of SRAM { block HEAP_STACK };
181 …llowing definitions ensure that SRAM will not be touched at all by startup ECC initialization when…
183 * the area of SRAM where "ROM type" sections are linked to
185 define exported symbol __ecc_init_sram_start_address = start(SRAM);
[all …]
|
| /bsp/Infineon/xmc7100d-f144k4160aa/libs/TARGET_APP_KIT_XMC71_EVK_LITE_V2/COMPONENT_CM7/TOOLCHAIN_IAR/ |
| A D | linker.icf | 41 define symbol sram_private_for_srom = 0x00000800; /* Private SRAM for SROM (e.g. API pr…
117 /* SRAM reservations */
139 define region SRAM = mem:[from _base_SRAM size _size_…
167 /* Link location specific assignment of 'readonly' type sections to either SRAM or CODE_FLASH */
173 place in SRAM { readwrite };
174 place in SRAM { block CY_SHAREDMEM };
175 place at end of SRAM { block HEAP_STACK };
180 …llowing definitions ensure that SRAM will not be touched at all by startup ECC initialization when…
182 * the area of SRAM where "ROM type" sections are linked to
184 define exported symbol __ecc_init_sram_start_address = start(SRAM);
[all …]
|