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/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/inc/
A Dht32f1xxxx_mctm.h170 #define IS_MCTM_BREAK_STATE(STATE) (((STATE) == MCTM_BREAK_ENABLE) || \ argument
171 ((STATE) == MCTM_BREAK_DISABLE))
180 #define IS_MCTM_CHAOE_STATE(STATE) (((STATE) == MCTM_CHAOE_ENABLE) || \ argument
181 ((STATE) == MCTM_CHAOE_DISABLE))
192 #define IS_MCTM_OSSI_STATE(STATE) (((STATE) == MCTM_OSSI_STATE_ENABLE) || \ argument
193 ((STATE) == MCTM_OSSI_STATE_DISABLE))
197 #define IS_MCTM_OSSR_STATE(STATE) (((STATE) == MCTM_OSSR_STATE_ENABLE) || \ argument
198 ((STATE) == MCTM_OSSR_STATE_DISABLE))
/bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/HT32F5xxxx_Driver/inc/
A Dht32f5xxxx_mctm.h227 #define IS_MCTM_BREAK_STATE(STATE) (((STATE) == MCTM_BREAK_ENABLE) || \ argument
228 ((STATE) == MCTM_BREAK_DISABLE))
237 #define IS_MCTM_CHAOE_STATE(STATE) (((STATE) == MCTM_CHAOE_ENABLE) || \ argument
238 ((STATE) == MCTM_CHAOE_DISABLE))
249 #define IS_MCTM_OSSI_STATE(STATE) (((STATE) == MCTM_OSSI_STATE_ENABLE) || \ argument
250 ((STATE) == MCTM_OSSI_STATE_DISABLE))
254 #define IS_MCTM_OSSR_STATE(STATE) (((STATE) == MCTM_OSSR_STATE_ENABLE) || \ argument
255 ((STATE) == MCTM_OSSR_STATE_DISABLE))
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_lobs_drv.c81 lobs->STATE[state].SIGSEL = LOBS_STATE_SIGSEL_EN_SET(1u << (config->sig_group_num)); in lobs_state_config()
82 lobs->STATE[state].TRIGCTRL = LOBS_STATE_TRIGCTRL_TRACE_SET(2) in lobs_state_config()
85 lobs->STATE[state].NEXTSTATE = LOBS_STATE_NEXTSTATE_NEXTSTATE_SET(config->next_state); in lobs_state_config()
89 lobs->STATE[state].COUNTCOMP = LOBS_STATE_COUNTCOMP_VALUE_SET(config->cmp_counter * 7u); in lobs_state_config()
91 lobs->STATE[state].COUNTCOMP = LOBS_STATE_COUNTCOMP_VALUE_SET(config->cmp_counter * 6u); in lobs_state_config()
102 lobs->STATE[state].EXTMASK = 0; in lobs_state_config()
103 lobs->STATE[state].EXTCOMP = 0; in lobs_state_config()
110 …lobs->STATE[state].SIGCOMP0 = (lobs->STATE[state].SIGCOMP0 & ~(1u << cmp_bit_index)) | (config->cm… in lobs_state_config()
112 …lobs->STATE[state].SIGCOMP1 = (lobs->STATE[state].SIGCOMP1 & ~(1u << cmp_bit_index)) | (config->cm… in lobs_state_config()
114 …lobs->STATE[state].SIGCOMP2 = (lobs->STATE[state].SIGCOMP2 & ~(1u << cmp_bit_index)) | (config->cm… in lobs_state_config()
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/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_hal_cortex.h295 #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \ argument
296 ((STATE) == MPU_REGION_DISABLE))
298 #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \ argument
299 ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
301 #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \ argument
302 ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
304 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \ argument
305 ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
307 #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \ argument
308 ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/inc/
A Dn32l40x_flash.h123 #define IS_FLASH_PREFETCHBUF_STATE(STATE) (((STATE) == FLASH_PrefetchBuf_EN) || ((STATE) == FLASH_P… argument
134 #define IS_FLASH_ICACHE_STATE(STATE) (((STATE) == FLASH_iCache_EN) || ((STATE) == FLASH_iCache_DIS)) argument
145 #define IS_FLASH_LVM(STATE) (((STATE) == FLASH_LVM_EN) || ((STATE) == FLASH_LVM_DIS)) argument
156 #define IS_FLASH_SLM(STATE) (((STATE) == FLASH_SLM_EN) || ((STATE) == FLASH_SLM_DIS)) argument
167 #define IS_FLASH_SMPSEL_STATE(STATE) (((STATE) == FLASH_SMPSEL_SMP1) || ((STATE) == FLASH_SMPSEL_SM… argument
A Dn32l40x_tim.h347 #define IsTimOutputState(STATE) (((STATE) == TIM_OUTPUT_STATE_DISABLE) || ((STATE) == TIM_OUTPUT_S… argument
358 #define IsTimOutputNState(STATE) (((STATE) == TIM_OUTPUT_NSTATE_DISABLE) || ((STATE) == TIM_OUTPUT… argument
391 #define IsTimBreakInState(STATE) (((STATE) == TIM_BREAK_IN_ENABLE) || ((STATE) == TIM_BREAK_IN_DISA… argument
413 #define IsTimAutoOutputState(STATE) (((STATE) == TIM_AUTO_OUTPUT_ENABLE) || ((STATE) == TIM_AUTO_OU… argument
439 #define IsTimOssiState(STATE) (((STATE) == TIM_OSSI_STATE_ENABLE) || ((STATE) == TIM_OSSI_STATE_DI… argument
450 #define IsTimOssrState(STATE) (((STATE) == TIM_OSSR_STATE_ENABLE) || ((STATE) == TIM_OSSR_STATE_DI… argument
461 #define IsTimOcIdleState(STATE) (((STATE) == TIM_OC_IDLE_STATE_SET) || ((STATE) == TIM_OC_IDLE_STAT… argument
472 #define IsTimOcnIdleState(STATE) (((STATE) == TIM_OCN_IDLE_STATE_SET) || ((STATE) == TIM_OCN_IDLE_S… argument
780 #define IsTimOcPreLoadState(STATE) (((STATE) == TIM_OC_PRE_LOAD_ENABLE) || ((STATE) == TIM_OC_PRE_L… argument
791 #define IsTimOcFastState(STATE) (((STATE) == TIM_OC_FAST_ENABLE) || ((STATE) == TIM_OC_FAST_DISABLE… argument
[all …]
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/inc/
A Dn32l43x_flash.h123 #define IS_FLASH_PREFETCHBUF_STATE(STATE) (((STATE) == FLASH_PrefetchBuf_EN) || ((STATE) == FLASH_P… argument
134 #define IS_FLASH_ICACHE_STATE(STATE) (((STATE) == FLASH_iCache_EN) || ((STATE) == FLASH_iCache_DIS)) argument
145 #define IS_FLASH_LVM(STATE) (((STATE) == FLASH_LVM_EN) || ((STATE) == FLASH_LVM_DIS)) argument
156 #define IS_FLASH_SLM(STATE) (((STATE) == FLASH_SLM_EN) || ((STATE) == FLASH_SLM_DIS)) argument
167 #define IS_FLASH_SMPSEL_STATE(STATE) (((STATE) == FLASH_SMPSEL_SMP1) || ((STATE) == FLASH_SMPSEL_SM… argument
A Dn32l43x_tim.h347 #define IsTimOutputState(STATE) (((STATE) == TIM_OUTPUT_STATE_DISABLE) || ((STATE) == TIM_OUTPUT_S… argument
358 #define IsTimOutputNState(STATE) (((STATE) == TIM_OUTPUT_NSTATE_DISABLE) || ((STATE) == TIM_OUTPUT… argument
391 #define IsTimBreakInState(STATE) (((STATE) == TIM_BREAK_IN_ENABLE) || ((STATE) == TIM_BREAK_IN_DISA… argument
413 #define IsTimAutoOutputState(STATE) (((STATE) == TIM_AUTO_OUTPUT_ENABLE) || ((STATE) == TIM_AUTO_OU… argument
439 #define IsTimOssiState(STATE) (((STATE) == TIM_OSSI_STATE_ENABLE) || ((STATE) == TIM_OSSI_STATE_DI… argument
450 #define IsTimOssrState(STATE) (((STATE) == TIM_OSSR_STATE_ENABLE) || ((STATE) == TIM_OSSR_STATE_DI… argument
461 #define IsTimOcIdleState(STATE) (((STATE) == TIM_OC_IDLE_STATE_SET) || ((STATE) == TIM_OC_IDLE_STAT… argument
472 #define IsTimOcnIdleState(STATE) (((STATE) == TIM_OCN_IDLE_STATE_SET) || ((STATE) == TIM_OCN_IDLE_S… argument
780 #define IsTimOcPreLoadState(STATE) (((STATE) == TIM_OC_PRE_LOAD_ENABLE) || ((STATE) == TIM_OC_PRE_L… argument
791 #define IsTimOcFastState(STATE) (((STATE) == TIM_OC_FAST_ENABLE) || ((STATE) == TIM_OC_FAST_DISABLE… argument
[all …]
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/inc/
A Dn32g43x_flash.h123 #define IS_FLASH_PREFETCHBUF_STATE(STATE) (((STATE) == FLASH_PrefetchBuf_EN) || ((STATE) == FLASH_P… argument
134 #define IS_FLASH_ICACHE_STATE(STATE) (((STATE) == FLASH_iCache_EN) || ((STATE) == FLASH_iCache_DIS)) argument
145 #define IS_FLASH_LVM(STATE) (((STATE) == FLASH_LVM_EN) || ((STATE) == FLASH_LVM_DIS)) argument
156 #define IS_FLASH_SLM(STATE) (((STATE) == FLASH_SLM_EN) || ((STATE) == FLASH_SLM_DIS)) argument
167 #define IS_FLASH_SMPSEL_STATE(STATE) (((STATE) == FLASH_SMPSEL_SMP1) || ((STATE) == FLASH_SMPSEL_SM… argument
A Dn32g43x_tim.h347 #define IsTimOutputState(STATE) (((STATE) == TIM_OUTPUT_STATE_DISABLE) || ((STATE) == TIM_OUTPUT_S… argument
358 #define IsTimOutputNState(STATE) (((STATE) == TIM_OUTPUT_NSTATE_DISABLE) || ((STATE) == TIM_OUTPUT… argument
391 #define IsTimBreakInState(STATE) (((STATE) == TIM_BREAK_IN_ENABLE) || ((STATE) == TIM_BREAK_IN_DISA… argument
413 #define IsTimAutoOutputState(STATE) (((STATE) == TIM_AUTO_OUTPUT_ENABLE) || ((STATE) == TIM_AUTO_OU… argument
439 #define IsTimOssiState(STATE) (((STATE) == TIM_OSSI_STATE_ENABLE) || ((STATE) == TIM_OSSI_STATE_DI… argument
450 #define IsTimOssrState(STATE) (((STATE) == TIM_OSSR_STATE_ENABLE) || ((STATE) == TIM_OSSR_STATE_DI… argument
461 #define IsTimOcIdleState(STATE) (((STATE) == TIM_OC_IDLE_STATE_SET) || ((STATE) == TIM_OC_IDLE_STAT… argument
472 #define IsTimOcnIdleState(STATE) (((STATE) == TIM_OCN_IDLE_STATE_SET) || ((STATE) == TIM_OCN_IDLE_S… argument
780 #define IsTimOcPreLoadState(STATE) (((STATE) == TIM_OC_PRE_LOAD_ENABLE) || ((STATE) == TIM_OC_PRE_L… argument
791 #define IsTimOcFastState(STATE) (((STATE) == TIM_OC_FAST_ENABLE) || ((STATE) == TIM_OC_FAST_DISABLE… argument
[all …]
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x_tim.h367 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ argument
379 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ argument
415 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ argument
467 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ argument
479 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ argument
491 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ argument
503 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ argument
836 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ argument
848 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ argument
861 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ argument
[all …]
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Inc/
A Dft32f0xx_tim.h374 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ argument
386 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ argument
422 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ argument
474 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ argument
486 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ argument
498 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ argument
510 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ argument
842 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ argument
854 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ argument
867 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ argument
[all …]
/bsp/tkm32F499/Libraries/Hal_lib/inc/
A DHAL_tim.h310 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ argument
322 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ argument
358 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ argument
410 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ argument
422 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ argument
434 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ argument
446 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ argument
778 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ argument
790 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ argument
803 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ argument
[all …]
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/
A DHAL_tim.h310 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ argument
322 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ argument
358 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ argument
410 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ argument
422 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ argument
434 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ argument
446 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ argument
778 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ argument
790 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ argument
803 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ argument
[all …]
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/inc/
A Dhk32f0xx_tim.h373 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ argument
385 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ argument
421 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ argument
473 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ argument
485 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ argument
497 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ argument
509 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ argument
841 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ argument
853 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ argument
866 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ argument
[all …]
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/inc/
A Dn32wb452_tim.h347 #define IsTimOutputState(STATE) (((STATE) == TIM_OUTPUT_STATE_DISABLE) || ((STATE) == TIM_OUTPUT_S… argument
358 #define IsTimOutputNState(STATE) (((STATE) == TIM_OUTPUT_NSTATE_DISABLE) || ((STATE) == TIM_OUTPUT… argument
391 #define IsTimBreakInState(STATE) (((STATE) == TIM_BREAK_IN_ENABLE) || ((STATE) == TIM_BREAK_IN_DISA… argument
413 #define IsTimAutoOutputState(STATE) (((STATE) == TIM_AUTO_OUTPUT_ENABLE) || ((STATE) == TIM_AUTO_OU… argument
439 #define IsTimOssiState(STATE) (((STATE) == TIM_OSSI_STATE_ENABLE) || ((STATE) == TIM_OSSI_STATE_DI… argument
450 #define IsTimOssrState(STATE) (((STATE) == TIM_OSSR_STATE_ENABLE) || ((STATE) == TIM_OSSR_STATE_DI… argument
461 #define IsTimOcIdleState(STATE) (((STATE) == TIM_OC_IDLE_STATE_SET) || ((STATE) == TIM_OC_IDLE_STAT… argument
472 #define IsTimOcnIdleState(STATE) (((STATE) == TIM_OCN_IDLE_STATE_SET) || ((STATE) == TIM_OCN_IDLE_S… argument
782 #define IsTimOcPreLoadState(STATE) (((STATE) == TIM_OC_PRE_LOAD_ENABLE) || ((STATE) == TIM_OC_PRE_L… argument
793 #define IsTimOcFastState(STATE) (((STATE) == TIM_OC_FAST_ENABLE) || ((STATE) == TIM_OC_FAST_DISABLE… argument
[all …]
A Dn32wb452_flash.h110 #define IS_FLASH_PREFETCHBUF_STATE(STATE) (((STATE) == FLASH_PrefetchBuf_EN) || ((STATE) == FLASH_P… argument
121 #define IS_FLASH_ICACHE_STATE(STATE) (((STATE) == FLASH_iCache_EN) || ((STATE) == FLASH_iCache_DIS)) argument
132 #define IS_FLASH_SMPSEL_STATE(STATE) (((STATE) == FLASH_SMPSEL_SMP1) || ((STATE) == FLASH_SMPSEL_SM… argument
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/inc/
A DHAL_tim.h240 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ argument
252 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ argument
288 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ argument
340 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ argument
352 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ argument
364 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ argument
376 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ argument
719 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ argument
731 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ argument
744 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ argument
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/
A Dn32g4fr_tim.h347 #define IsTimOutputState(STATE) (((STATE) == TIM_OUTPUT_STATE_DISABLE) || ((STATE) == TIM_OUTPUT_S… argument
358 #define IsTimOutputNState(STATE) (((STATE) == TIM_OUTPUT_NSTATE_DISABLE) || ((STATE) == TIM_OUTPUT… argument
391 #define IsTimBreakInState(STATE) (((STATE) == TIM_BREAK_IN_ENABLE) || ((STATE) == TIM_BREAK_IN_DISA… argument
413 #define IsTimAutoOutputState(STATE) (((STATE) == TIM_AUTO_OUTPUT_ENABLE) || ((STATE) == TIM_AUTO_OU… argument
439 #define IsTimOssiState(STATE) (((STATE) == TIM_OSSI_STATE_ENABLE) || ((STATE) == TIM_OSSI_STATE_DI… argument
450 #define IsTimOssrState(STATE) (((STATE) == TIM_OSSR_STATE_ENABLE) || ((STATE) == TIM_OSSR_STATE_DI… argument
461 #define IsTimOcIdleState(STATE) (((STATE) == TIM_OC_IDLE_STATE_SET) || ((STATE) == TIM_OC_IDLE_STAT… argument
472 #define IsTimOcnIdleState(STATE) (((STATE) == TIM_OCN_IDLE_STATE_SET) || ((STATE) == TIM_OCN_IDLE_S… argument
781 #define IsTimOcPreLoadState(STATE) (((STATE) == TIM_OC_PRE_LOAD_ENABLE) || ((STATE) == TIM_OC_PRE_L… argument
792 #define IsTimOcFastState(STATE) (((STATE) == TIM_OC_FAST_ENABLE) || ((STATE) == TIM_OC_FAST_DISABLE… argument
[all …]
A Dn32g4fr_flash.h110 #define IS_FLASH_PREFETCHBUF_STATE(STATE) (((STATE) == FLASH_PrefetchBuf_EN) || ((STATE) == FLASH_P… argument
121 #define IS_FLASH_ICACHE_STATE(STATE) (((STATE) == FLASH_iCache_EN) || ((STATE) == FLASH_iCache_DIS)) argument
132 #define IS_FLASH_SMPSEL_STATE(STATE) (((STATE) == FLASH_SMPSEL_SMP1) || ((STATE) == FLASH_SMPSEL_SM… argument
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/
A Dn32g45x_tim.h347 #define IsTimOutputState(STATE) (((STATE) == TIM_OUTPUT_STATE_DISABLE) || ((STATE) == TIM_OUTPUT_S… argument
358 #define IsTimOutputNState(STATE) (((STATE) == TIM_OUTPUT_NSTATE_DISABLE) || ((STATE) == TIM_OUTPUT… argument
391 #define IsTimBreakInState(STATE) (((STATE) == TIM_BREAK_IN_ENABLE) || ((STATE) == TIM_BREAK_IN_DISA… argument
413 #define IsTimAutoOutputState(STATE) (((STATE) == TIM_AUTO_OUTPUT_ENABLE) || ((STATE) == TIM_AUTO_OU… argument
439 #define IsTimOssiState(STATE) (((STATE) == TIM_OSSI_STATE_ENABLE) || ((STATE) == TIM_OSSI_STATE_DI… argument
450 #define IsTimOssrState(STATE) (((STATE) == TIM_OSSR_STATE_ENABLE) || ((STATE) == TIM_OSSR_STATE_DI… argument
461 #define IsTimOcIdleState(STATE) (((STATE) == TIM_OC_IDLE_STATE_SET) || ((STATE) == TIM_OC_IDLE_STAT… argument
472 #define IsTimOcnIdleState(STATE) (((STATE) == TIM_OCN_IDLE_STATE_SET) || ((STATE) == TIM_OCN_IDLE_S… argument
781 #define IsTimOcPreLoadState(STATE) (((STATE) == TIM_OC_PRE_LOAD_ENABLE) || ((STATE) == TIM_OC_PRE_L… argument
792 #define IsTimOcFastState(STATE) (((STATE) == TIM_OC_FAST_ENABLE) || ((STATE) == TIM_OC_FAST_DISABLE… argument
[all …]
A Dn32g45x_flash.h110 #define IS_FLASH_PREFETCHBUF_STATE(STATE) (((STATE) == FLASH_PrefetchBuf_EN) || ((STATE) == FLASH_P… argument
121 #define IS_FLASH_ICACHE_STATE(STATE) (((STATE) == FLASH_iCache_EN) || ((STATE) == FLASH_iCache_DIS)) argument
132 #define IS_FLASH_SMPSEL_STATE(STATE) (((STATE) == FLASH_SMPSEL_SMP1) || ((STATE) == FLASH_SMPSEL_SM… argument
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/inc/
A DHAL_tim.h240 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ argument
252 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ argument
288 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ argument
340 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ argument
352 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ argument
364 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ argument
376 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ argument
719 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ argument
731 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ argument
744 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ argument
[all …]
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/
A Dn32g45x_tim.h347 #define IsTimOutputState(STATE) (((STATE) == TIM_OUTPUT_STATE_DISABLE) || ((STATE) == TIM_OUTPUT_S… argument
358 #define IsTimOutputNState(STATE) (((STATE) == TIM_OUTPUT_NSTATE_DISABLE) || ((STATE) == TIM_OUTPUT… argument
391 #define IsTimBreakInState(STATE) (((STATE) == TIM_BREAK_IN_ENABLE) || ((STATE) == TIM_BREAK_IN_DISA… argument
413 #define IsTimAutoOutputState(STATE) (((STATE) == TIM_AUTO_OUTPUT_ENABLE) || ((STATE) == TIM_AUTO_OU… argument
439 #define IsTimOssiState(STATE) (((STATE) == TIM_OSSI_STATE_ENABLE) || ((STATE) == TIM_OSSI_STATE_DI… argument
450 #define IsTimOssrState(STATE) (((STATE) == TIM_OSSR_STATE_ENABLE) || ((STATE) == TIM_OSSR_STATE_DI… argument
461 #define IsTimOcIdleState(STATE) (((STATE) == TIM_OC_IDLE_STATE_SET) || ((STATE) == TIM_OC_IDLE_STAT… argument
472 #define IsTimOcnIdleState(STATE) (((STATE) == TIM_OCN_IDLE_STATE_SET) || ((STATE) == TIM_OCN_IDLE_S… argument
783 #define IsTimOcPreLoadState(STATE) (((STATE) == TIM_OC_PRE_LOAD_ENABLE) || ((STATE) == TIM_OC_PRE_L… argument
794 #define IsTimOcFastState(STATE) (((STATE) == TIM_OC_FAST_ENABLE) || ((STATE) == TIM_OC_FAST_DISABLE… argument
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A Dn32g45x_flash.h110 #define IS_FLASH_PREFETCHBUF_STATE(STATE) (((STATE) == FLASH_PrefetchBuf_EN) || ((STATE) == FLASH_P… argument
121 #define IS_FLASH_ICACHE_STATE(STATE) (((STATE) == FLASH_iCache_EN) || ((STATE) == FLASH_iCache_DIS)) argument
132 #define IS_FLASH_SMPSEL_STATE(STATE) (((STATE) == FLASH_SMPSEL_SMP1) || ((STATE) == FLASH_SMPSEL_SM… argument

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