Searched refs:SUNXI_SPI0_PBASE (Results 1 – 3 of 3) sorted by relevance
36 #define SUNXI_SPI0_PBASE 0X05010000 /* 4K */ macro43 {.reg_base = SUNXI_SPI0_PBASE, .irq_num = SUNXI_IRQ_SPI0, .gpio_num = 6, \
36 #define SUNXI_SPI0_PBASE (0x04025000ul) /* 4K */ macro43 {.reg_base = SUNXI_SPI0_PBASE, .irq_num = SUNXI_IRQ_SPI0, .gpio_num = 6, \
36 #define SUNXI_SPI0_PBASE 0X05010000 /* 4K */ macro45 {.reg_base = SUNXI_SPI0_PBASE, .irq_num = SUNXI_IRQ_SPI0, .gpio_num = 6, \
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