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Searched refs:SYNCBUSY (Results 1 – 25 of 262) sorted by relevance

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/bsp/efm32/Libraries/emlib/src/
A Dem_wdog.c72 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL) in WDOG_Enable()
94 if (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CMD) in WDOG_Feed()
159 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL) in WDOG_Init()
201 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL) in WDOG_Lock()
A Dem_rtc.c91 while (RTC->SYNCBUSY & mask) in RTC_Sync()
260 while (RTC->SYNCBUSY) in RTC_FreezeEnable()
A Dem_burtc.c160 while (BURTC->SYNCBUSY) ; in BURTC_Init()
190 while (BURTC->SYNCBUSY & BURTC_SYNCBUSY_COMP0) ; in BURTC_CompareSet()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/tcc/
A Dtcc.h1705 return (module_inst->hw->SYNCBUSY.reg > 0); in tcc_is_syncing()
1762 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_ENABLE) { in tcc_enable()
1787 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_ENABLE) { in tcc_disable()
1863 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_set_count_direction()
1893 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_toggle_count_direction()
1948 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_stop_counter()
1987 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_restart_counter()
2031 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_dma_trigger_command()
2038 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_dma_trigger_command()
2127 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_set_ramp_index()
[all …]
A Dtcc.c625 while (hw->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_init()
630 while (hw->SYNCBUSY.reg & TCC_SYNCBUSY_CTRLB) { in tcc_init()
647 while (hw->SYNCBUSY.reg & TCC_SYNCBUSY_COUNT) { in tcc_init()
661 while (hw->SYNCBUSY.reg & ( in tcc_init()
932 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_COUNT) { in tcc_set_count_value()
982 while (tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_COUNT) { in tcc_get_count_value()
1073 while(tcc_module->SYNCBUSY.reg & in _tcc_set_compare_value()
1198 while(tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_PERB) { in _tcc_set_top_value()
1204 while(tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_PER) { in _tcc_set_top_value()
1331 while(tcc_module->SYNCBUSY.reg & TCC_SYNCBUSY_PATT) { in tcc_set_pattern()
[all …]
/bsp/samd21/sam_d2x_asflib/sam0/drivers/i2s/
A Di2s.h812 return (module_inst->hw->SYNCBUSY.reg > 0); in i2s_is_syncing()
843 while (module_inst->hw->SYNCBUSY.reg & I2S_SYNCBUSY_ENABLE) { in i2s_enable()
861 while (module_inst->hw->SYNCBUSY.reg & I2S_SYNCBUSY_ENABLE) { in i2s_disable()
987 while (module_inst->hw->SYNCBUSY.reg & cken_bit) { in i2s_clock_unit_enable()
1012 while (module_inst->hw->SYNCBUSY.reg & cken_bit) { in i2s_clock_unit_disable()
1121 while (module_inst->hw->SYNCBUSY.reg & seren_bit) { in i2s_serializer_enable()
1146 while (module_inst->hw->SYNCBUSY.reg & seren_bit) { in i2s_serializer_disable()
1204 while (module_inst->hw->SYNCBUSY.reg & sync_bit) { in i2s_serializer_write_wait()
1233 while (module_inst->hw->SYNCBUSY.reg & sync_bit) { in i2s_serializer_read_wait()
A Di2s.c149 syncbusy = module_inst->hw->SYNCBUSY.reg; in i2s_clock_unit_set_config()
265 syncbusy = module_inst->hw->SYNCBUSY.reg; in i2s_serializer_set_config()
353 if (module_inst->hw->SYNCBUSY.reg) { in i2s_get_status()
365 !module_inst->hw->SYNCBUSY.bit.DATA0) { in i2s_get_status()
369 !module_inst->hw->SYNCBUSY.bit.DATA1) { in i2s_get_status()
602 while(module_inst->hw->SYNCBUSY.reg & sync_bit) { in i2s_serializer_write_buffer_wait()
614 while(module_inst->hw->SYNCBUSY.reg & sync_bit) { in i2s_serializer_write_buffer_wait()
626 while(module_inst->hw->SYNCBUSY.reg & sync_bit) { in i2s_serializer_write_buffer_wait()
704 while(module_inst->hw->SYNCBUSY.reg & sync_bit) { in i2s_serializer_read_buffer_wait()
717 while(module_inst->hw->SYNCBUSY.reg & sync_bit) { in i2s_serializer_read_buffer_wait()
[all …]
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_gclk_d51.h60 while (((Gclk *)hw)->SYNCBUSY.reg & reg) { in hri_gclk_wait_for_sync()
66 return ((Gclk *)hw)->SYNCBUSY.reg & reg; in hri_gclk_is_syncing()
71 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_SWRST) >> GCLK_SYNCBUSY_SWRST_Pos; in hri_gclk_get_SYNCBUSY_SWRST_bit()
76 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL0) >> GCLK_SYNCBUSY_GENCTRL0_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL0_bit()
81 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL1) >> GCLK_SYNCBUSY_GENCTRL1_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL1_bit()
86 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL2) >> GCLK_SYNCBUSY_GENCTRL2_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL2_bit()
91 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL3) >> GCLK_SYNCBUSY_GENCTRL3_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL3_bit()
96 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL4) >> GCLK_SYNCBUSY_GENCTRL4_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL4_bit()
101 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL5) >> GCLK_SYNCBUSY_GENCTRL5_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL5_bit()
137 tmp = ((Gclk *)hw)->SYNCBUSY.reg; in hri_gclk_get_SYNCBUSY_reg()
[all …]
A Dhri_freqm_d51.h64 while (((Freqm *)hw)->SYNCBUSY.reg & reg) { in hri_freqm_wait_for_sync()
70 return ((Freqm *)hw)->SYNCBUSY.reg & reg; in hri_freqm_is_syncing()
166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
171 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_ENABLE) >> FREQM_SYNCBUSY_ENABLE_Pos; in hri_freqm_get_SYNCBUSY_ENABLE_bit()
177 tmp = ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_get_SYNCBUSY_reg()
184 return ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_read_SYNCBUSY_reg()
A Dhri_wdt_d51.h63 while (((Wdt *)hw)->SYNCBUSY.reg & reg) { in hri_wdt_wait_for_sync()
69 return ((Wdt *)hw)->SYNCBUSY.reg & reg; in hri_wdt_is_syncing()
165 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ENABLE) >> WDT_SYNCBUSY_ENABLE_Pos; in hri_wdt_get_SYNCBUSY_ENABLE_bit()
170 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_WEN) >> WDT_SYNCBUSY_WEN_Pos; in hri_wdt_get_SYNCBUSY_WEN_bit()
175 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ALWAYSON) >> WDT_SYNCBUSY_ALWAYSON_Pos; in hri_wdt_get_SYNCBUSY_ALWAYSON_bit()
180 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_CLEAR) >> WDT_SYNCBUSY_CLEAR_Pos; in hri_wdt_get_SYNCBUSY_CLEAR_bit()
186 tmp = ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_get_SYNCBUSY_reg()
193 return ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_read_SYNCBUSY_reg()
/bsp/microchip/same54/bsp/hri/
A Dhri_gclk_e54.h60 while (((Gclk *)hw)->SYNCBUSY.reg & reg) { in hri_gclk_wait_for_sync()
66 return ((Gclk *)hw)->SYNCBUSY.reg & reg; in hri_gclk_is_syncing()
71 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_SWRST) >> GCLK_SYNCBUSY_SWRST_Pos; in hri_gclk_get_SYNCBUSY_SWRST_bit()
76 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL0) >> GCLK_SYNCBUSY_GENCTRL0_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL0_bit()
81 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL1) >> GCLK_SYNCBUSY_GENCTRL1_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL1_bit()
86 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL2) >> GCLK_SYNCBUSY_GENCTRL2_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL2_bit()
91 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL3) >> GCLK_SYNCBUSY_GENCTRL3_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL3_bit()
96 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL4) >> GCLK_SYNCBUSY_GENCTRL4_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL4_bit()
101 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL5) >> GCLK_SYNCBUSY_GENCTRL5_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL5_bit()
137 tmp = ((Gclk *)hw)->SYNCBUSY.reg; in hri_gclk_get_SYNCBUSY_reg()
[all …]
A Dhri_freqm_e54.h64 while (((Freqm *)hw)->SYNCBUSY.reg & reg) { in hri_freqm_wait_for_sync()
70 return ((Freqm *)hw)->SYNCBUSY.reg & reg; in hri_freqm_is_syncing()
166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
171 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_ENABLE) >> FREQM_SYNCBUSY_ENABLE_Pos; in hri_freqm_get_SYNCBUSY_ENABLE_bit()
177 tmp = ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_get_SYNCBUSY_reg()
184 return ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_read_SYNCBUSY_reg()
A Dhri_wdt_e54.h63 while (((Wdt *)hw)->SYNCBUSY.reg & reg) { in hri_wdt_wait_for_sync()
69 return ((Wdt *)hw)->SYNCBUSY.reg & reg; in hri_wdt_is_syncing()
165 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ENABLE) >> WDT_SYNCBUSY_ENABLE_Pos; in hri_wdt_get_SYNCBUSY_ENABLE_bit()
170 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_WEN) >> WDT_SYNCBUSY_WEN_Pos; in hri_wdt_get_SYNCBUSY_WEN_bit()
175 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ALWAYSON) >> WDT_SYNCBUSY_ALWAYSON_Pos; in hri_wdt_get_SYNCBUSY_ALWAYSON_bit()
180 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_CLEAR) >> WDT_SYNCBUSY_CLEAR_Pos; in hri_wdt_get_SYNCBUSY_CLEAR_bit()
186 tmp = ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_get_SYNCBUSY_reg()
193 return ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_read_SYNCBUSY_reg()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_gclk_d51.h60 while (((Gclk *)hw)->SYNCBUSY.reg & reg) { in hri_gclk_wait_for_sync()
66 return ((Gclk *)hw)->SYNCBUSY.reg & reg; in hri_gclk_is_syncing()
71 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_SWRST) >> GCLK_SYNCBUSY_SWRST_Pos; in hri_gclk_get_SYNCBUSY_SWRST_bit()
76 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL0) >> GCLK_SYNCBUSY_GENCTRL0_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL0_bit()
81 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL1) >> GCLK_SYNCBUSY_GENCTRL1_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL1_bit()
86 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL2) >> GCLK_SYNCBUSY_GENCTRL2_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL2_bit()
91 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL3) >> GCLK_SYNCBUSY_GENCTRL3_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL3_bit()
96 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL4) >> GCLK_SYNCBUSY_GENCTRL4_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL4_bit()
101 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL5) >> GCLK_SYNCBUSY_GENCTRL5_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL5_bit()
137 tmp = ((Gclk *)hw)->SYNCBUSY.reg; in hri_gclk_get_SYNCBUSY_reg()
[all …]
A Dhri_freqm_d51.h64 while (((Freqm *)hw)->SYNCBUSY.reg & reg) { in hri_freqm_wait_for_sync()
70 return ((Freqm *)hw)->SYNCBUSY.reg & reg; in hri_freqm_is_syncing()
166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
171 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_ENABLE) >> FREQM_SYNCBUSY_ENABLE_Pos; in hri_freqm_get_SYNCBUSY_ENABLE_bit()
177 tmp = ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_get_SYNCBUSY_reg()
184 return ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_read_SYNCBUSY_reg()
A Dhri_wdt_d51.h63 while (((Wdt *)hw)->SYNCBUSY.reg & reg) { in hri_wdt_wait_for_sync()
69 return ((Wdt *)hw)->SYNCBUSY.reg & reg; in hri_wdt_is_syncing()
165 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ENABLE) >> WDT_SYNCBUSY_ENABLE_Pos; in hri_wdt_get_SYNCBUSY_ENABLE_bit()
170 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_WEN) >> WDT_SYNCBUSY_WEN_Pos; in hri_wdt_get_SYNCBUSY_WEN_bit()
175 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ALWAYSON) >> WDT_SYNCBUSY_ALWAYSON_Pos; in hri_wdt_get_SYNCBUSY_ALWAYSON_bit()
180 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_CLEAR) >> WDT_SYNCBUSY_CLEAR_Pos; in hri_wdt_get_SYNCBUSY_CLEAR_bit()
186 tmp = ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_get_SYNCBUSY_reg()
193 return ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_read_SYNCBUSY_reg()
/bsp/microchip/samc21/bsp/hri/
A Dhri_gclk_c21.h60 while (((Gclk *)hw)->SYNCBUSY.reg & reg) { in hri_gclk_wait_for_sync()
66 return ((Gclk *)hw)->SYNCBUSY.reg & reg; in hri_gclk_is_syncing()
71 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_SWRST) >> GCLK_SYNCBUSY_SWRST_Pos; in hri_gclk_get_SYNCBUSY_SWRST_bit()
76 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL0) >> GCLK_SYNCBUSY_GENCTRL0_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL0_bit()
81 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL1) >> GCLK_SYNCBUSY_GENCTRL1_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL1_bit()
86 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL2) >> GCLK_SYNCBUSY_GENCTRL2_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL2_bit()
91 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL3) >> GCLK_SYNCBUSY_GENCTRL3_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL3_bit()
96 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL4) >> GCLK_SYNCBUSY_GENCTRL4_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL4_bit()
101 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL5) >> GCLK_SYNCBUSY_GENCTRL5_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL5_bit()
122 tmp = ((Gclk *)hw)->SYNCBUSY.reg; in hri_gclk_get_SYNCBUSY_reg()
[all …]
A Dhri_freqm_c21.h64 while (((Freqm *)hw)->SYNCBUSY.reg & reg) { in hri_freqm_wait_for_sync()
70 return ((Freqm *)hw)->SYNCBUSY.reg & reg; in hri_freqm_is_syncing()
166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
171 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_ENABLE) >> FREQM_SYNCBUSY_ENABLE_Pos; in hri_freqm_get_SYNCBUSY_ENABLE_bit()
177 tmp = ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_get_SYNCBUSY_reg()
184 return ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_read_SYNCBUSY_reg()
A Dhri_wdt_c21.h63 while (((Wdt *)hw)->SYNCBUSY.reg & reg) { in hri_wdt_wait_for_sync()
69 return ((Wdt *)hw)->SYNCBUSY.reg & reg; in hri_wdt_is_syncing()
165 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ENABLE) >> WDT_SYNCBUSY_ENABLE_Pos; in hri_wdt_get_SYNCBUSY_ENABLE_bit()
170 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_WEN) >> WDT_SYNCBUSY_WEN_Pos; in hri_wdt_get_SYNCBUSY_WEN_bit()
175 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ALWAYSON) >> WDT_SYNCBUSY_ALWAYSON_Pos; in hri_wdt_get_SYNCBUSY_ALWAYSON_bit()
180 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_CLEAR) >> WDT_SYNCBUSY_CLEAR_Pos; in hri_wdt_get_SYNCBUSY_CLEAR_bit()
186 tmp = ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_get_SYNCBUSY_reg()
193 return ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_read_SYNCBUSY_reg()
A Dhri_dac_c21.h66 while (((Dac *)hw)->SYNCBUSY.reg & reg) { in hri_dac_wait_for_sync()
72 return ((Dac *)hw)->SYNCBUSY.reg & reg; in hri_dac_is_syncing()
230 return (((Dac *)hw)->SYNCBUSY.reg & DAC_SYNCBUSY_SWRST) >> DAC_SYNCBUSY_SWRST_Pos; in hri_dac_get_SYNCBUSY_SWRST_bit()
235 return (((Dac *)hw)->SYNCBUSY.reg & DAC_SYNCBUSY_ENABLE) >> DAC_SYNCBUSY_ENABLE_Pos; in hri_dac_get_SYNCBUSY_ENABLE_bit()
240 return (((Dac *)hw)->SYNCBUSY.reg & DAC_SYNCBUSY_DATA) >> DAC_SYNCBUSY_DATA_Pos; in hri_dac_get_SYNCBUSY_DATA_bit()
245 return (((Dac *)hw)->SYNCBUSY.reg & DAC_SYNCBUSY_DATABUF) >> DAC_SYNCBUSY_DATABUF_Pos; in hri_dac_get_SYNCBUSY_DATABUF_bit()
251 tmp = ((Dac *)hw)->SYNCBUSY.reg; in hri_dac_get_SYNCBUSY_reg()
258 return ((Dac *)hw)->SYNCBUSY.reg; in hri_dac_read_SYNCBUSY_reg()
/bsp/microchip/saml10/bsp/hri/
A Dhri_wdt_l10.h63 while (((Wdt *)hw)->SYNCBUSY.reg & reg) { in hri_wdt_wait_for_sync()
69 return ((Wdt *)hw)->SYNCBUSY.reg & reg; in hri_wdt_is_syncing()
165 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ENABLE_Msk) >> WDT_SYNCBUSY_ENABLE_Pos; in hri_wdt_get_SYNCBUSY_ENABLE_bit()
170 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_WEN_Msk) >> WDT_SYNCBUSY_WEN_Pos; in hri_wdt_get_SYNCBUSY_WEN_bit()
175 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_RUNSTDBY_Msk) >> WDT_SYNCBUSY_RUNSTDBY_Pos; in hri_wdt_get_SYNCBUSY_RUNSTDBY_bit()
180 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_ALWAYSON_Msk) >> WDT_SYNCBUSY_ALWAYSON_Pos; in hri_wdt_get_SYNCBUSY_ALWAYSON_bit()
185 return (((Wdt *)hw)->SYNCBUSY.reg & WDT_SYNCBUSY_CLEAR_Msk) >> WDT_SYNCBUSY_CLEAR_Pos; in hri_wdt_get_SYNCBUSY_CLEAR_bit()
191 tmp = ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_get_SYNCBUSY_reg()
198 return ((Wdt *)hw)->SYNCBUSY.reg; in hri_wdt_read_SYNCBUSY_reg()
A Dhri_freqm_l10.h64 while (((Freqm *)hw)->SYNCBUSY.reg & reg) { in hri_freqm_wait_for_sync()
70 return ((Freqm *)hw)->SYNCBUSY.reg & reg; in hri_freqm_is_syncing()
166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST_Msk) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
171 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_ENABLE_Msk) >> FREQM_SYNCBUSY_ENABLE_Pos; in hri_freqm_get_SYNCBUSY_ENABLE_bit()
177 tmp = ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_get_SYNCBUSY_reg()
184 return ((Freqm *)hw)->SYNCBUSY.reg; in hri_freqm_read_SYNCBUSY_reg()
A Dhri_gclk_l10.h60 while (((Gclk *)hw)->SYNCBUSY.reg & reg) { in hri_gclk_wait_for_sync()
66 return ((Gclk *)hw)->SYNCBUSY.reg & reg; in hri_gclk_is_syncing()
71 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_SWRST_Msk) >> GCLK_SYNCBUSY_SWRST_Pos; in hri_gclk_get_SYNCBUSY_SWRST_bit()
76 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL0_Msk) >> GCLK_SYNCBUSY_GENCTRL0_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL0_bit()
81 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL1_Msk) >> GCLK_SYNCBUSY_GENCTRL1_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL1_bit()
86 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL2_Msk) >> GCLK_SYNCBUSY_GENCTRL2_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL2_bit()
91 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL3_Msk) >> GCLK_SYNCBUSY_GENCTRL3_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL3_bit()
96 return (((Gclk *)hw)->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL4_Msk) >> GCLK_SYNCBUSY_GENCTRL4_Pos; in hri_gclk_get_SYNCBUSY_GENCTRL4_bit()
102 tmp = ((Gclk *)hw)->SYNCBUSY.reg; in hri_gclk_get_SYNCBUSY_reg()
109 return ((Gclk *)hw)->SYNCBUSY.reg; in hri_gclk_read_SYNCBUSY_reg()
A Dhri_tram_l10.h65 while (((Tram *)hw)->SYNCBUSY.reg & reg) { in hri_tram_wait_for_sync()
71 return ((Tram *)hw)->SYNCBUSY.reg & reg; in hri_tram_is_syncing()
234 return (((Tram *)hw)->SYNCBUSY.reg & TRAM_SYNCBUSY_SWRST_Msk) >> TRAM_SYNCBUSY_SWRST_Pos; in hri_tram_get_SYNCBUSY_SWRST_bit()
239 return (((Tram *)hw)->SYNCBUSY.reg & TRAM_SYNCBUSY_ENABLE_Msk) >> TRAM_SYNCBUSY_ENABLE_Pos; in hri_tram_get_SYNCBUSY_ENABLE_bit()
245 tmp = ((Tram *)hw)->SYNCBUSY.reg; in hri_tram_get_SYNCBUSY_reg()
252 return ((Tram *)hw)->SYNCBUSY.reg; in hri_tram_read_SYNCBUSY_reg()
A Dhri_dac_l10.h66 while (((Dac *)hw)->SYNCBUSY.reg & reg) { in hri_dac_wait_for_sync()
72 return ((Dac *)hw)->SYNCBUSY.reg & reg; in hri_dac_is_syncing()
230 return (((Dac *)hw)->SYNCBUSY.reg & DAC_SYNCBUSY_SWRST_Msk) >> DAC_SYNCBUSY_SWRST_Pos; in hri_dac_get_SYNCBUSY_SWRST_bit()
235 return (((Dac *)hw)->SYNCBUSY.reg & DAC_SYNCBUSY_ENABLE_Msk) >> DAC_SYNCBUSY_ENABLE_Pos; in hri_dac_get_SYNCBUSY_ENABLE_bit()
240 return (((Dac *)hw)->SYNCBUSY.reg & DAC_SYNCBUSY_DATA_Msk) >> DAC_SYNCBUSY_DATA_Pos; in hri_dac_get_SYNCBUSY_DATA_bit()
245 return (((Dac *)hw)->SYNCBUSY.reg & DAC_SYNCBUSY_DATABUF_Msk) >> DAC_SYNCBUSY_DATABUF_Pos; in hri_dac_get_SYNCBUSY_DATABUF_bit()
251 tmp = ((Dac *)hw)->SYNCBUSY.reg; in hri_dac_get_SYNCBUSY_reg()
258 return ((Dac *)hw)->SYNCBUSY.reg; in hri_dac_read_SYNCBUSY_reg()

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