1 /** 2 ****************************************************************************** 3 * @file ft32f0xx_syscfg.h 4 * @author FMD AE 5 * @brief This file contains all the functions prototypes for the SYSCFG firmware 6 * library. 7 * @version V1.0.0 8 * @data 2021-07-01 9 ****************************************************************************** 10 */ 11 12 13 /*!< Define to prevent recursive inclusion -------------------------------------*/ 14 #ifndef __FT32F0XX_SYSCFG_H 15 #define __FT32F0XX_SYSCFG_H 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 /*!< Includes ------------------------------------------------------------------*/ 22 #include "ft32f0xx.h" 23 24 25 /** @addtogroup SYSCFG 26 * @{ 27 */ 28 /* Exported types ------------------------------------------------------------*/ 29 /* Exported constants --------------------------------------------------------*/ 30 31 /** @defgroup SYSCFG_Exported_Constants 32 * @{ 33 */ 34 35 /** @defgroup SYSCFG_EXTI_Port_Sources 36 * @{ 37 */ 38 #define EXTI_PortSourceGPIOA ((uint8_t)0x00) 39 #define EXTI_PortSourceGPIOB ((uint8_t)0x01) 40 #define EXTI_PortSourceGPIOC ((uint8_t)0x02) 41 #define EXTI_PortSourceGPIOD ((uint8_t)0x03) 42 #define EXTI_PortSourceGPIOE ((uint8_t)0x04) 43 #define EXTI_PortSourceGPIOF ((uint8_t)0x05) 44 45 #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \ 46 ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \ 47 ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \ 48 ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \ 49 ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \ 50 ((PORTSOURCE) == EXTI_PortSourceGPIOF)) 51 /** 52 * @} 53 */ 54 55 /** @defgroup SYSCFG_EXTI_Pin_sources 56 * @{ 57 */ 58 #define EXTI_PinSource0 ((uint8_t)0x00) 59 #define EXTI_PinSource1 ((uint8_t)0x01) 60 #define EXTI_PinSource2 ((uint8_t)0x02) 61 #define EXTI_PinSource3 ((uint8_t)0x03) 62 #define EXTI_PinSource4 ((uint8_t)0x04) 63 #define EXTI_PinSource5 ((uint8_t)0x05) 64 #define EXTI_PinSource6 ((uint8_t)0x06) 65 #define EXTI_PinSource7 ((uint8_t)0x07) 66 #define EXTI_PinSource8 ((uint8_t)0x08) 67 #define EXTI_PinSource9 ((uint8_t)0x09) 68 #define EXTI_PinSource10 ((uint8_t)0x0A) 69 #define EXTI_PinSource11 ((uint8_t)0x0B) 70 #define EXTI_PinSource12 ((uint8_t)0x0C) 71 #define EXTI_PinSource13 ((uint8_t)0x0D) 72 #define EXTI_PinSource14 ((uint8_t)0x0E) 73 #define EXTI_PinSource15 ((uint8_t)0x0F) 74 75 #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \ 76 ((PINSOURCE) == EXTI_PinSource1) || \ 77 ((PINSOURCE) == EXTI_PinSource2) || \ 78 ((PINSOURCE) == EXTI_PinSource3) || \ 79 ((PINSOURCE) == EXTI_PinSource4) || \ 80 ((PINSOURCE) == EXTI_PinSource5) || \ 81 ((PINSOURCE) == EXTI_PinSource6) || \ 82 ((PINSOURCE) == EXTI_PinSource7) || \ 83 ((PINSOURCE) == EXTI_PinSource8) || \ 84 ((PINSOURCE) == EXTI_PinSource9) || \ 85 ((PINSOURCE) == EXTI_PinSource10) || \ 86 ((PINSOURCE) == EXTI_PinSource11) || \ 87 ((PINSOURCE) == EXTI_PinSource12) || \ 88 ((PINSOURCE) == EXTI_PinSource13) || \ 89 ((PINSOURCE) == EXTI_PinSource14) || \ 90 ((PINSOURCE) == EXTI_PinSource15)) 91 /** 92 * @} 93 */ 94 95 /** @defgroup SYSCFG_Memory_Remap_Config 96 * @{ 97 */ 98 #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00) 99 #define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01) 100 #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03) 101 102 103 #define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ 104 ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \ 105 ((REMAP) == SYSCFG_MemoryRemap_SRAM)) 106 107 /** 108 * @} 109 */ 110 111 /** @defgroup SYSCFG_DMA_Remap_Config 112 * @{ 113 */ 114 #define SYSCFG_DMARemap_TIM3 SYSCFG_CFGR1_TIM3_DMA_RMP /* Remap TIM3 DMA requests from channel4 to channel6*/ 115 #define SYSCFG_DMARemap_TIM2 SYSCFG_CFGR1_TIM2_DMA_RMP /* Remap TIM2 DMA requests from channel3/4 to channel7*/ 116 #define SYSCFG_DMARemap_TIM1 SYSCFG_CFGR1_TIM1_DMA_RMP /* Remap TIM1 DMA requests from channel2/3/4 to channel6*/ 117 #define SYSCFG_DMARemap_I2C1 SYSCFG_CFGR1_I2C1_DMA_RMP /* Remap I2C1 DMA requests from channel3/2 to channel7/6*/ 118 #define SYSCFG_DMARemap_USART3 SYSCFG_CFGR1_USART3_DMA_RMP /* Remap USART3 DMA requests from channel6/7 to channel3/2*/ 119 #define SYSCFG_DMARemap_USART2 SYSCFG_CFGR1_USART2_DMA_RMP /* Remap USART2 DMA requests from channel4/5 to channel6/7*/ 120 #define SYSCFG_DMARemap_SPI2 SYSCFG_CFGR1_SPI2_DMA_RMP /* Remap SPI2 DMA requests from channel4/5 to channel6/7*/ 121 #define SYSCFG_DMARemap_TIM17_2 SYSCFG_CFGR1_TIM17_DMA_RMP2 /* Remap TIM17 DMA requests from channel1/2 to channel7*/ 122 #define SYSCFG_DMARemap_TIM16_2 SYSCFG_CFGR1_TIM16_DMA_RMP2 /* Remap TIM16 DMA requests from channel3/4 to channel6*/ 123 #define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /* Remap TIM17 DMA requests from channel1 to channel2*/ 124 #define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /* Remap TIM16 DMA requests from channel3 to channel4*/ 125 #define SYSCFG_DMARemap_USART1Rx SYSCFG_CFGR1_USART1RX_DMA_RMP /* Remap USART1 Rx DMA requests from channel3 to channel5*/ 126 #define SYSCFG_DMARemap_USART1Tx SYSCFG_CFGR1_USART1TX_DMA_RMP /* Remap USART1 Tx DMA requests from channel2 to channel4*/ 127 #define SYSCFG_DMARemap_ADC1 SYSCFG_CFGR1_ADC_DMA_RMP /* Remap ADC1 DMA requests from channel1 to channel2*/ 128 129 #define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \ 130 ((REMAP) == SYSCFG_DMARemap_TIM16) || \ 131 ((REMAP) == SYSCFG_DMARemap_USART1Rx) || \ 132 ((REMAP) == SYSCFG_DMARemap_USART1Tx) || \ 133 ((REMAP) == SYSCFG_CFGR1_TIM3_DMA_RMP) || \ 134 ((REMAP) == SYSCFG_CFGR1_TIM2_DMA_RMP) || \ 135 ((REMAP) == SYSCFG_CFGR1_TIM1_DMA_RMP) || \ 136 ((REMAP) == SYSCFG_CFGR1_I2C1_DMA_RMP) || \ 137 ((REMAP) == SYSCFG_CFGR1_USART3_DMA_RMP) || \ 138 ((REMAP) == SYSCFG_CFGR1_USART2_DMA_RMP) || \ 139 ((REMAP) == SYSCFG_CFGR1_SPI2_DMA_RMP) || \ 140 ((REMAP) == SYSCFG_CFGR1_TIM17_DMA_RMP2) || \ 141 ((REMAP) == SYSCFG_CFGR1_TIM16_DMA_RMP2) || \ 142 ((REMAP) == SYSCFG_DMARemap_ADC1)) 143 144 /** 145 * @} 146 */ 147 148 /** @defgroup SYSCFG_I2C_FastModePlus_Config 149 * @{ 150 */ 151 #define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /* Enable Fast Mode Plus on PB6 */ 152 #define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /* Enable Fast Mode Plus on PB7 */ 153 #define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /* Enable Fast Mode Plus on PB8 */ 154 #define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /* Enable Fast Mode Plus on PB9 */ 155 #define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR1_I2C_FMP_I2C1 /* Enable Fast Mode Plus on PB10, PB11, PF6 and PF7*/ 156 #define SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR1_I2C_FMP_I2C2 /* Enable Fast Mode Plus on I2C2 pins*/ 157 #define SYSCFG_I2CFastModePlus_PA9 SYSCFG_CFGR1_I2C_FMP_PA9 /* Enable Fast Mode Plus on PA9*/ 158 #define SYSCFG_I2CFastModePlus_PA10 SYSCFG_CFGR1_I2C_FMP_PA10/* Enable Fast Mode Plus on PA10*/ 159 160 #define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \ 161 ((PIN) == SYSCFG_I2CFastModePlus_PB7) || \ 162 ((PIN) == SYSCFG_I2CFastModePlus_PB8) || \ 163 ((PIN) == SYSCFG_I2CFastModePlus_PB9) || \ 164 ((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \ 165 ((PIN) == SYSCFG_I2CFastModePlus_I2C2) || \ 166 ((PIN) == SYSCFG_I2CFastModePlus_PA9) || \ 167 ((PIN) == SYSCFG_I2CFastModePlus_PA10)) 168 169 170 /** 171 * @} 172 */ 173 174 /** @defgroup SYSCFG_Lock_Config 175 * @{ 176 */ 177 #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Connects the PVD event to the Break Input of TIM1 */ 178 #define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK /*!< Connects Lockup output of CortexM0 to the break input of TIM1 */ 179 180 #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \ 181 ((CONFIG) == SYSCFG_Break_Lockup)) 182 183 /** 184 * @} 185 */ 186 187 /** 188 * @} 189 */ 190 191 /** @defgroup SYSCFG_ISR_WRAPPER 192 * @{ 193 */ 194 #define SYSCFG_ITLINE0 ((uint32_t) 0x00000000) 195 #define SYSCFG_ITLINE1 ((uint32_t) 0x00000001) 196 #define SYSCFG_ITLINE2 ((uint32_t) 0x00000002) 197 #define SYSCFG_ITLINE3 ((uint32_t) 0x00000003) 198 #define SYSCFG_ITLINE4 ((uint32_t) 0x00000004) 199 #define SYSCFG_ITLINE5 ((uint32_t) 0x00000005) 200 #define SYSCFG_ITLINE6 ((uint32_t) 0x00000006) 201 #define SYSCFG_ITLINE7 ((uint32_t) 0x00000007) 202 #define SYSCFG_ITLINE8 ((uint32_t) 0x00000008) 203 #define SYSCFG_ITLINE9 ((uint32_t) 0x00000009) 204 #define SYSCFG_ITLINE10 ((uint32_t) 0x0000000A) 205 #define SYSCFG_ITLINE11 ((uint32_t) 0x0000000B) 206 #define SYSCFG_ITLINE12 ((uint32_t) 0x0000000C) 207 #define SYSCFG_ITLINE13 ((uint32_t) 0x0000000D) 208 #define SYSCFG_ITLINE14 ((uint32_t) 0x0000000E) 209 #define SYSCFG_ITLINE15 ((uint32_t) 0x0000000F) 210 #define SYSCFG_ITLINE16 ((uint32_t) 0x00000010) 211 #define SYSCFG_ITLINE17 ((uint32_t) 0x00000011) 212 #define SYSCFG_ITLINE18 ((uint32_t) 0x00000012) 213 #define SYSCFG_ITLINE19 ((uint32_t) 0x00000013) 214 #define SYSCFG_ITLINE20 ((uint32_t) 0x00000014) 215 #define SYSCFG_ITLINE21 ((uint32_t) 0x00000015) 216 #define SYSCFG_ITLINE22 ((uint32_t) 0x00000016) 217 #define SYSCFG_ITLINE23 ((uint32_t) 0x00000017) 218 #define SYSCFG_ITLINE24 ((uint32_t) 0x00000018) 219 #define SYSCFG_ITLINE25 ((uint32_t) 0x00000019) 220 #define SYSCFG_ITLINE26 ((uint32_t) 0x0000001A) 221 #define SYSCFG_ITLINE27 ((uint32_t) 0x0000001B) 222 #define SYSCFG_ITLINE28 ((uint32_t) 0x0000001C) 223 #define SYSCFG_ITLINE29 ((uint32_t) 0x0000001D) 224 #define SYSCFG_ITLINE30 ((uint32_t) 0x0000001E) 225 #define SYSCFG_ITLINE31 ((uint32_t) 0x0000001F) 226 227 /** 228 * @} 229 */ 230 /** @defgroup IRDA_ENV_SEL 231 * @{ 232 */ 233 #define SYSCFG_IRDA_ENV_SEL_TIM16 (SYSCFG_CFGR1_IRDA_ENV_SEL_0&SYSCFG_CFGR1_IRDA_ENV_SEL_1) /* Timer16 is selected as IRDA Modulation envelope source */ 234 #define SYSCFG_IRDA_ENV_SEL_USART1 (SYSCFG_CFGR1_IRDA_ENV_SEL_0) /* USART1 is selected as IRDA Modulation envelope source.*/ 235 #define SYSCFG_IRDA_ENV_SEL_USART2 (SYSCFG_CFGR1_IRDA_ENV_SEL_1) /* USART2 is selected as IRDA Modulation envelope source.*/ 236 237 #define IS_SYSCFG_IRDA_ENV(ENV) (((ENV) == SYSCFG_IRDA_ENV_SEL_TIM16) || \ 238 ((ENV) == SYSCFG_IRDA_ENV_SEL_USART1) || \ 239 ((ENV) == SYSCFG_IRDA_ENV_SEL_USART2)) 240 /** 241 * @} 242 */ 243 244 /** 245 * @} 246 */ 247 248 /* Exported macro ------------------------------------------------------------*/ 249 /* Exported functions ------------------------------------------------------- */ 250 251 /* Function used to set the SYSCFG configuration to the default reset state **/ 252 void SYSCFG_DeInit(void); 253 254 /* SYSCFG configuration functions *********************************************/ 255 void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap); 256 void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState); 257 void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState); 258 void SYSCFG_IRDAEnvSelection(uint32_t SYSCFG_IRDAEnv); 259 void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex); 260 void SYSCFG_BreakConfig(uint32_t SYSCFG_Break); 261 262 #ifdef __cplusplus 263 } 264 #endif 265 266 #endif /*__FT32F0XX_SYSCFG_H */ 267 268 /** 269 * @} 270 */ 271 272 /** 273 * @} 274 */ 275 276 /************************ (C) COPYRIGHT FMD *****END OF FILE****/ 277