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Searched refs:SYSCTL_DCGCBASE (Results 1 – 6 of 6) sorted by relevance

/bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/
A Dsysctl.c323 #define SYSCTL_DCGCBASE 0x400fe800 macro
1020 HWREGBITW(SYSCTL_DCGCBASE + ((ui32Peripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepEnable()
1086 HWREGBITW(SYSCTL_DCGCBASE + ((ui32Peripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepDisable()
/bsp/lm4f232/Libraries/driverlib/
A Dsysctl.c171 #define SYSCTL_DCGCBASE 0x400fe800 macro
1200 HWREGBITW(SYSCTL_DCGCBASE + ((ulPeripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepEnable()
1279 HWREGBITW(SYSCTL_DCGCBASE + ((ulPeripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepDisable()
/bsp/lm3s9b9x/Libraries/driverlib/
A Dsysctl.c171 #define SYSCTL_DCGCBASE 0x400fe800 macro
1200 HWREGBITW(SYSCTL_DCGCBASE + ((ulPeripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepEnable()
1279 HWREGBITW(SYSCTL_DCGCBASE + ((ulPeripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepDisable()
/bsp/lm3s8962/Libraries/driverlib/
A Dsysctl.c171 #define SYSCTL_DCGCBASE 0x400fe800 macro
1200 HWREGBITW(SYSCTL_DCGCBASE + ((ulPeripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepEnable()
1279 HWREGBITW(SYSCTL_DCGCBASE + ((ulPeripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepDisable()
/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/src/
A Dsysctl.c347 #define SYSCTL_DCGCBASE 0x400fe800 macro
1107 HWREGBITW(SYSCTL_DCGCBASE + ((ui32Peripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepEnable()
1175 HWREGBITW(SYSCTL_DCGCBASE + ((ui32Peripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepDisable()
/bsp/tm4c129x/libraries/driverlib/
A Dsysctl.c347 #define SYSCTL_DCGCBASE 0x400fe800 macro
1107 HWREGBITW(SYSCTL_DCGCBASE + ((ui32Peripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepEnable()
1175 HWREGBITW(SYSCTL_DCGCBASE + ((ui32Peripheral & 0xff00) >> 8), in SysCtlPeripheralDeepSleepDisable()

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