| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/ |
| A D | samd20e14.h | 368 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20e15.h | 368 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20g14.h | 375 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20g15.h | 375 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20g16.h | 375 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20g17.h | 375 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20g17u.h | 375 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20g18.h | 375 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20g18u.h | 375 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20e16.h | 368 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20e17.h | 368 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20e18.h | 368 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
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| A D | samd20j14.h | 386 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
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| A D | samd20j15.h | 386 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
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| A D | samd20j16.h | 386 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
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| A D | samd20j17.h | 386 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
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| A D | samd20j18.h | 386 #define TC1 (0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
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| /bsp/microchip/samc21/bsp/samc21/include/ |
| A D | samc21e15a.h | 436 #define TC1 (0x42003400) /**< \brief (TC1) APB Base Address */ macro
569 #define TC1 ((Tc *)0x42003400UL) /**< \brief (TC1) APB Base Address */ macro
574 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
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| A D | samc21e16a.h | 436 #define TC1 (0x42003400) /**< \brief (TC1) APB Base Address */ macro
569 #define TC1 ((Tc *)0x42003400UL) /**< \brief (TC1) APB Base Address */ macro
574 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
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| A D | samc21e17a.h | 436 #define TC1 (0x42003400) /**< \brief (TC1) APB Base Address */ macro
569 #define TC1 ((Tc *)0x42003400UL) /**< \brief (TC1) APB Base Address */ macro
574 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
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| A D | samc21e18a.h | 436 #define TC1 (0x42003400) /**< \brief (TC1) APB Base Address */ macro
569 #define TC1 ((Tc *)0x42003400UL) /**< \brief (TC1) APB Base Address */ macro
574 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
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| A D | samc21g15a.h | 451 #define TC1 (0x42003400) /**< \brief (TC1) APB Base Address */ macro
587 #define TC1 ((Tc *)0x42003400UL) /**< \brief (TC1) APB Base Address */ macro
592 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
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| A D | samc21g16a.h | 451 #define TC1 (0x42003400) /**< \brief (TC1) APB Base Address */ macro
587 #define TC1 ((Tc *)0x42003400UL) /**< \brief (TC1) APB Base Address */ macro
592 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
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| A D | samc21g17a.h | 451 #define TC1 (0x42003400) /**< \brief (TC1) APB Base Address */ macro
587 #define TC1 ((Tc *)0x42003400UL) /**< \brief (TC1) APB Base Address */ macro
592 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
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| /bsp/upd70f3454/drivers/ |
| A D | CG_system.c | 61 if(TC1 == 0 && E11 == 1){ /* DMA1 transfer judgment */ in clock_pcc_mode()
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