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Searched refs:TC2 (Results 1 – 25 of 75) sorted by relevance

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/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/
A Dsamd20e14.h369 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20e15.h369 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20g14.h376 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20g15.h376 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20g16.h376 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20g17.h376 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20g17u.h376 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20g18.h376 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20g18u.h376 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
464 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20e16.h369 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20e17.h369 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20e18.h369 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
455 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5 } /**< \brief (TC) Instances List */
A Dsamd20j14.h387 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
A Dsamd20j15.h387 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
A Dsamd20j16.h387 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
A Dsamd20j17.h387 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
A Dsamd20j18.h387 #define TC2 (0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */ macro
479 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4, TC5, TC6, TC7 } /**< \brief (TC) Instances Lis…
/bsp/microchip/samc21/bsp/samc21/include/
A Dsamc21e15a.h437 #define TC2 (0x42003800) /**< \brief (TC2) APB Base Address */ macro
570 #define TC2 ((Tc *)0x42003800UL) /**< \brief (TC2) APB Base Address */ macro
574 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
A Dsamc21e16a.h437 #define TC2 (0x42003800) /**< \brief (TC2) APB Base Address */ macro
570 #define TC2 ((Tc *)0x42003800UL) /**< \brief (TC2) APB Base Address */ macro
574 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
A Dsamc21e17a.h437 #define TC2 (0x42003800) /**< \brief (TC2) APB Base Address */ macro
570 #define TC2 ((Tc *)0x42003800UL) /**< \brief (TC2) APB Base Address */ macro
574 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
A Dsamc21e18a.h437 #define TC2 (0x42003800) /**< \brief (TC2) APB Base Address */ macro
570 #define TC2 ((Tc *)0x42003800UL) /**< \brief (TC2) APB Base Address */ macro
574 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
A Dsamc21g15a.h452 #define TC2 (0x42003800) /**< \brief (TC2) APB Base Address */ macro
588 #define TC2 ((Tc *)0x42003800UL) /**< \brief (TC2) APB Base Address */ macro
592 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
A Dsamc21g16a.h452 #define TC2 (0x42003800) /**< \brief (TC2) APB Base Address */ macro
588 #define TC2 ((Tc *)0x42003800UL) /**< \brief (TC2) APB Base Address */ macro
592 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
A Dsamc21g17a.h452 #define TC2 (0x42003800) /**< \brief (TC2) APB Base Address */ macro
588 #define TC2 ((Tc *)0x42003800UL) /**< \brief (TC2) APB Base Address */ macro
592 #define TC_INSTS { TC0, TC1, TC2, TC3, TC4 } /**< \brief (TC) Instances List */
/bsp/upd70f3454/drivers/
A DCG_system.c64 if(TC2 == 0 && E22 == 1){ /* DMA2 transfer judgment */ in clock_pcc_mode()

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