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Searched refs:TC_CTRLA_RUNSTDBY (Results 1 – 12 of 12) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/drivers/tc/tc_sam_d_r_h/
A Dtc.c247 ctrla_tmp |= TC_CTRLA_RUNSTDBY; in tc_init()
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dtc.h122 #define TC_CTRLA_RUNSTDBY (0x1ul << TC_CTRLA_RUNSTDBY_Pos) macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dtc.h125 #define TC_CTRLA_RUNSTDBY (0x1ul << TC_CTRLA_RUNSTDBY_Pos) macro
/bsp/microchip/samc21/bsp/hri/
A Dhri_tc_c21.h560 ((Tc *)hw)->COUNT16.CTRLA.reg |= TC_CTRLA_RUNSTDBY; in hri_tc_set_CTRLA_RUNSTDBY_bit()
569 tmp = (tmp & TC_CTRLA_RUNSTDBY) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
578 tmp &= ~TC_CTRLA_RUNSTDBY; in hri_tc_write_CTRLA_RUNSTDBY_bit()
588 ((Tc *)hw)->COUNT16.CTRLA.reg &= ~TC_CTRLA_RUNSTDBY; in hri_tc_clear_CTRLA_RUNSTDBY_bit()
596 ((Tc *)hw)->COUNT16.CTRLA.reg ^= TC_CTRLA_RUNSTDBY; in hri_tc_toggle_CTRLA_RUNSTDBY_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_tc_d51.h560 ((Tc *)hw)->COUNT16.CTRLA.reg |= TC_CTRLA_RUNSTDBY; in hri_tc_set_CTRLA_RUNSTDBY_bit()
569 tmp = (tmp & TC_CTRLA_RUNSTDBY) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
578 tmp &= ~TC_CTRLA_RUNSTDBY; in hri_tc_write_CTRLA_RUNSTDBY_bit()
588 ((Tc *)hw)->COUNT16.CTRLA.reg &= ~TC_CTRLA_RUNSTDBY; in hri_tc_clear_CTRLA_RUNSTDBY_bit()
596 ((Tc *)hw)->COUNT16.CTRLA.reg ^= TC_CTRLA_RUNSTDBY; in hri_tc_toggle_CTRLA_RUNSTDBY_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_tc_e54.h560 ((Tc *)hw)->COUNT16.CTRLA.reg |= TC_CTRLA_RUNSTDBY; in hri_tc_set_CTRLA_RUNSTDBY_bit()
569 tmp = (tmp & TC_CTRLA_RUNSTDBY) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
578 tmp &= ~TC_CTRLA_RUNSTDBY; in hri_tc_write_CTRLA_RUNSTDBY_bit()
588 ((Tc *)hw)->COUNT16.CTRLA.reg &= ~TC_CTRLA_RUNSTDBY; in hri_tc_clear_CTRLA_RUNSTDBY_bit()
596 ((Tc *)hw)->COUNT16.CTRLA.reg ^= TC_CTRLA_RUNSTDBY; in hri_tc_toggle_CTRLA_RUNSTDBY_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_tc_d51.h560 ((Tc *)hw)->COUNT16.CTRLA.reg |= TC_CTRLA_RUNSTDBY; in hri_tc_set_CTRLA_RUNSTDBY_bit()
569 tmp = (tmp & TC_CTRLA_RUNSTDBY) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
578 tmp &= ~TC_CTRLA_RUNSTDBY; in hri_tc_write_CTRLA_RUNSTDBY_bit()
588 ((Tc *)hw)->COUNT16.CTRLA.reg &= ~TC_CTRLA_RUNSTDBY; in hri_tc_clear_CTRLA_RUNSTDBY_bit()
596 ((Tc *)hw)->COUNT16.CTRLA.reg ^= TC_CTRLA_RUNSTDBY; in hri_tc_toggle_CTRLA_RUNSTDBY_bit()
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dtc.h99 #define TC_CTRLA_RUNSTDBY (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos) macro
/bsp/microchip/same54/bsp/include/component/
A Dtc.h103 #define TC_CTRLA_RUNSTDBY (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dtc.h103 #define TC_CTRLA_RUNSTDBY (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dtc.h103 #define TC_CTRLA_RUNSTDBY (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos) macro
/bsp/microchip/saml10/bsp/include/component/
A Dtc.h109 #define TC_CTRLA_RUNSTDBY TC_CTRLA_RUNSTDBY_Msk /**< \de… macro

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