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Searched refs:TC_CTRLA_RUNSTDBY_Pos (Results 1 – 13 of 13) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dtc.h121 #define TC_CTRLA_RUNSTDBY_Pos 11 /**< \brief (TC_CTRLA) Run in Standby */ macro
122 #define TC_CTRLA_RUNSTDBY (0x1ul << TC_CTRLA_RUNSTDBY_Pos)
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dtc.h124 #define TC_CTRLA_RUNSTDBY_Pos 11 /**< \brief (TC_CTRLA) Run in Standby */ macro
125 #define TC_CTRLA_RUNSTDBY (0x1ul << TC_CTRLA_RUNSTDBY_Pos)
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dtc.h98 #define TC_CTRLA_RUNSTDBY_Pos 6 /**< \brief (TC_CTRLA) Run during Standby */ macro
99 #define TC_CTRLA_RUNSTDBY (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos)
/bsp/microchip/same54/bsp/include/component/
A Dtc.h102 #define TC_CTRLA_RUNSTDBY_Pos 6 /**< \brief (TC_CTRLA) Run during Standby */ macro
103 #define TC_CTRLA_RUNSTDBY (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos)
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dtc.h102 #define TC_CTRLA_RUNSTDBY_Pos 6 /**< \brief (TC_CTRLA) Run during Standby */ macro
103 #define TC_CTRLA_RUNSTDBY (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos)
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dtc.h102 #define TC_CTRLA_RUNSTDBY_Pos 6 /**< \brief (TC_CTRLA) Run during Standby */ macro
103 #define TC_CTRLA_RUNSTDBY (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos)
/bsp/microchip/saml10/bsp/include/component/
A Dtc.h107 #define TC_CTRLA_RUNSTDBY_Pos 6 /**< (TC… macro
108 #define TC_CTRLA_RUNSTDBY_Msk (_U_(0x1) << TC_CTRLA_RUNSTDBY_Pos) /**< (TC…
/bsp/samd21/sam_d2x_asflib/sam0/drivers/tc/tc_sam_l_c/
A Dtc.c260 ctrla_tmp |= (config->run_in_standby << TC_CTRLA_RUNSTDBY_Pos) in tc_init()
/bsp/microchip/samc21/bsp/hri/
A Dhri_tc_c21.h569 tmp = (tmp & TC_CTRLA_RUNSTDBY) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
579 tmp |= value << TC_CTRLA_RUNSTDBY_Pos; in hri_tc_write_CTRLA_RUNSTDBY_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_tc_d51.h569 tmp = (tmp & TC_CTRLA_RUNSTDBY) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
579 tmp |= value << TC_CTRLA_RUNSTDBY_Pos; in hri_tc_write_CTRLA_RUNSTDBY_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_tc_e54.h569 tmp = (tmp & TC_CTRLA_RUNSTDBY) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
579 tmp |= value << TC_CTRLA_RUNSTDBY_Pos; in hri_tc_write_CTRLA_RUNSTDBY_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_tc_d51.h569 tmp = (tmp & TC_CTRLA_RUNSTDBY) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
579 tmp |= value << TC_CTRLA_RUNSTDBY_Pos; in hri_tc_write_CTRLA_RUNSTDBY_bit()
/bsp/microchip/saml10/bsp/hri/
A Dhri_tc_l10.h573 tmp = (tmp & TC_CTRLA_RUNSTDBY_Msk) >> TC_CTRLA_RUNSTDBY_Pos; in hri_tc_get_CTRLA_RUNSTDBY_bit()
583 tmp |= value << TC_CTRLA_RUNSTDBY_Pos; in hri_tc_write_CTRLA_RUNSTDBY_bit()

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