Home
last modified time | relevance | path

Searched refs:TC_CTRLBSET_DIR (Results 1 – 13 of 13) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/drivers/tc/tc_sam_d_r_h/
A Dtc.c262 ctrlbset_tmp |= TC_CTRLBSET_DIR; in tc_init()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/tc/tc_sam_l_c/
A Dtc.c281 ctrlbset_tmp |= TC_CTRLBSET_DIR; in tc_init()
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dtc.h209 #define TC_CTRLBSET_DIR (0x1ul << TC_CTRLBSET_DIR_Pos) macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dtc.h212 #define TC_CTRLBSET_DIR (0x1ul << TC_CTRLBSET_DIR_Pos) macro
/bsp/microchip/samc21/bsp/hri/
A Dhri_tc_c21.h186 ((Tc *)hw)->COUNT16.CTRLBSET.reg = TC_CTRLBSET_DIR; in hri_tc_set_CTRLB_DIR_bit()
191 return (((Tc *)hw)->COUNT16.CTRLBSET.reg & TC_CTRLBSET_DIR) >> TC_CTRLBSET_DIR_Pos; in hri_tc_get_CTRLB_DIR_bit()
197 ((Tc *)hw)->COUNT16.CTRLBCLR.reg = TC_CTRLBSET_DIR; in hri_tc_write_CTRLB_DIR_bit()
199 ((Tc *)hw)->COUNT16.CTRLBSET.reg = TC_CTRLBSET_DIR; in hri_tc_write_CTRLB_DIR_bit()
205 ((Tc *)hw)->COUNT16.CTRLBCLR.reg = TC_CTRLBSET_DIR; in hri_tc_clear_CTRLB_DIR_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_tc_d51.h186 ((Tc *)hw)->COUNT16.CTRLBSET.reg = TC_CTRLBSET_DIR; in hri_tc_set_CTRLB_DIR_bit()
191 return (((Tc *)hw)->COUNT16.CTRLBSET.reg & TC_CTRLBSET_DIR) >> TC_CTRLBSET_DIR_Pos; in hri_tc_get_CTRLB_DIR_bit()
197 ((Tc *)hw)->COUNT16.CTRLBCLR.reg = TC_CTRLBSET_DIR; in hri_tc_write_CTRLB_DIR_bit()
199 ((Tc *)hw)->COUNT16.CTRLBSET.reg = TC_CTRLBSET_DIR; in hri_tc_write_CTRLB_DIR_bit()
205 ((Tc *)hw)->COUNT16.CTRLBCLR.reg = TC_CTRLBSET_DIR; in hri_tc_clear_CTRLB_DIR_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_tc_e54.h186 ((Tc *)hw)->COUNT16.CTRLBSET.reg = TC_CTRLBSET_DIR; in hri_tc_set_CTRLB_DIR_bit()
191 return (((Tc *)hw)->COUNT16.CTRLBSET.reg & TC_CTRLBSET_DIR) >> TC_CTRLBSET_DIR_Pos; in hri_tc_get_CTRLB_DIR_bit()
197 ((Tc *)hw)->COUNT16.CTRLBCLR.reg = TC_CTRLBSET_DIR; in hri_tc_write_CTRLB_DIR_bit()
199 ((Tc *)hw)->COUNT16.CTRLBSET.reg = TC_CTRLBSET_DIR; in hri_tc_write_CTRLB_DIR_bit()
205 ((Tc *)hw)->COUNT16.CTRLBCLR.reg = TC_CTRLBSET_DIR; in hri_tc_clear_CTRLB_DIR_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_tc_d51.h186 ((Tc *)hw)->COUNT16.CTRLBSET.reg = TC_CTRLBSET_DIR; in hri_tc_set_CTRLB_DIR_bit()
191 return (((Tc *)hw)->COUNT16.CTRLBSET.reg & TC_CTRLBSET_DIR) >> TC_CTRLBSET_DIR_Pos; in hri_tc_get_CTRLB_DIR_bit()
197 ((Tc *)hw)->COUNT16.CTRLBCLR.reg = TC_CTRLBSET_DIR; in hri_tc_write_CTRLB_DIR_bit()
199 ((Tc *)hw)->COUNT16.CTRLBSET.reg = TC_CTRLBSET_DIR; in hri_tc_write_CTRLB_DIR_bit()
205 ((Tc *)hw)->COUNT16.CTRLBCLR.reg = TC_CTRLBSET_DIR; in hri_tc_clear_CTRLB_DIR_bit()
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dtc.h197 #define TC_CTRLBSET_DIR (_U_(0x1) << TC_CTRLBSET_DIR_Pos) macro
/bsp/microchip/same54/bsp/include/component/
A Dtc.h219 #define TC_CTRLBSET_DIR (_U_(0x1) << TC_CTRLBSET_DIR_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dtc.h219 #define TC_CTRLBSET_DIR (_U_(0x1) << TC_CTRLBSET_DIR_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dtc.h219 #define TC_CTRLBSET_DIR (_U_(0x1) << TC_CTRLBSET_DIR_Pos) macro
/bsp/microchip/saml10/bsp/include/component/
A Dtc.h239 #define TC_CTRLBSET_DIR TC_CTRLBSET_DIR_Msk /**< \de… macro

Completed in 705 milliseconds