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Searched refs:TDMA_RING_REG_BASE (Results 1 – 4 of 4) sorted by relevance

/bsp/raspberry-pi/raspi4-64/drivers/
A Ddrv_eth.h147 #define TDMA_RING_REG_BASE \ macro
149 #define TDMA_READ_PTR (TDMA_RING_REG_BASE + 0x00)
150 #define TDMA_CONS_INDEX (TDMA_RING_REG_BASE + 0x08)
151 #define TDMA_PROD_INDEX (TDMA_RING_REG_BASE + 0x0c)
156 #define TDMA_FLOW_PERIOD (TDMA_RING_REG_BASE + 0x28)
157 #define TDMA_WRITE_PTR (TDMA_RING_REG_BASE + 0x2c)
A Ddrv_eth.c291 write32(mac_reg_base_addr + TDMA_RING_REG_BASE + DMA_START_ADDR, 0x0); in tx_ring_init()
296 … write32(mac_reg_base_addr + TDMA_RING_REG_BASE + DMA_END_ADDR, TX_DESCS * DMA_DESC_SIZE / 4 - 1); in tx_ring_init()
299 write32(mac_reg_base_addr + TDMA_RING_REG_BASE + DMA_MBUF_DONE_THRESH, 0x1); in tx_ring_init()
301 …write32(mac_reg_base_addr + TDMA_RING_REG_BASE + DMA_RING_BUF_SIZE, (TX_DESCS << DMA_RING_SIZE_SHI… in tx_ring_init()
/bsp/raspberry-pi/raspi4-32/driver/
A Ddrv_eth.h147 #define TDMA_RING_REG_BASE \ macro
149 #define TDMA_READ_PTR (TDMA_RING_REG_BASE + 0x00)
150 #define TDMA_CONS_INDEX (TDMA_RING_REG_BASE + 0x08)
151 #define TDMA_PROD_INDEX (TDMA_RING_REG_BASE + 0x0c)
156 #define TDMA_FLOW_PERIOD (TDMA_RING_REG_BASE + 0x28)
157 #define TDMA_WRITE_PTR (TDMA_RING_REG_BASE + 0x2c)
A Ddrv_eth.c299 write32(MAC_REG + TDMA_RING_REG_BASE + DMA_START_ADDR, 0x0); in tx_ring_init()
304 write32(MAC_REG + TDMA_RING_REG_BASE + DMA_END_ADDR, TX_DESCS * DMA_DESC_SIZE / 4 - 1); in tx_ring_init()
307 write32(MAC_REG + TDMA_RING_REG_BASE + DMA_MBUF_DONE_THRESH, 0x1); in tx_ring_init()
309 …write32(MAC_REG + TDMA_RING_REG_BASE + DMA_RING_BUF_SIZE, (TX_DESCS << DMA_RING_SIZE_SHIFT) | RX_B… in tx_ring_init()

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