| /bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/inc/ |
| A D | HAL_tim.h | 438 (((*(uint32_t*)&(PERIPH)) == TIM4_BASE)) || (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))))&& \
559 (((*(uint32_t*)&(PERIPH)) == TIM4_BASE)) || (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))))&& \
691 (((*(uint32_t*)&(PERIPH)) == TIM4_BASE)) || (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))))&& \
773 (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
778 … (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
783 … (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
787 … (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
866 (((*(uint32_t*)&(PERIPH)) == TIM4_BASE)) || (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))))&& \
873 ((*(uint32_t*)&(PERIPH)) == TIM4_BASE) || ((*(uint32_t*)&(PERIPH))==TIM5_BASE) || \
879 ((*(uint32_t*)&(PERIPH)) == TIM4_BASE) || ((*(uint32_t*)&(PERIPH))==TIM5_BASE) ||\
[all …]
|
| /bsp/mm32f103x/Libraries/MM32F103/HAL_lib/inc/ |
| A D | HAL_tim.h | 438 (((*(uint32_t*)&(PERIPH)) == TIM4_BASE)) || (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))))&& \
559 (((*(uint32_t*)&(PERIPH)) == TIM4_BASE)) || (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))))&& \
691 (((*(uint32_t*)&(PERIPH)) == TIM4_BASE)) || (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))))&& \
773 (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
778 (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
783 (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
787 (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
791 (((*(uint32_t*)&(PERIPH)) == TIM5_BASE))||(((*(uint32_t*)&(PERIPH)) == TIM8_BASE))) && \
873 ((*(uint32_t*)&(PERIPH)) == TIM4_BASE) || ((*(uint32_t*)&(PERIPH))==TIM5_BASE) || \
879 ((*(uint32_t*)&(PERIPH)) == TIM4_BASE) || ((*(uint32_t*)&(PERIPH))==TIM5_BASE) ||\
[all …]
|
| /bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ |
| A D | ab32vg1_hal_tim.h | 29 #define TIM5_BASE ((hal_sfr_t)&TMR5CON) macro
|
| /bsp/bluetrum/libraries/hal_drivers/config/ |
| A D | tim_config.h | 78 .tim_handle = TIM5_BASE, \
|
| A D | pwm_config.h | 58 .pwm_handle = TIM5_BASE, \
|
| /bsp/mm32f327x/Libraries/MM32F327x/Include/ |
| A D | reg_tim.h | 54 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) ///< Base Address: … macro
109 #define TIM5 ((TIM_TypeDef*) TIM5_BASE)
|
| /bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/CMSIS/WCH/CH32V10x/Include/ |
| A D | ch32v10x.h | 516 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
586 #define TIM5 ((TIM_TypeDef *)TIM5_BASE)
|
| /bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/inc/ |
| A D | ch32v10x.h | 516 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
586 #define TIM5 ((TIM_TypeDef *)TIM5_BASE)
|
| /bsp/tkm32F499/Libraries/CMSIS_and_startup/ |
| A D | tk499.h | 1283 #define TIM5_BASE (APB1PERIPH_BASE + 0x0800) macro
1335 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| /bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/CMSIS/WCH/CH32F10x/Include/ |
| A D | ch32f10x.h | 612 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
684 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| /bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/inc/ |
| A D | ch32f10x.h | 612 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
684 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| /bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/CMSIS/WCH/CH32F20x/Include/ |
| A D | ch32f20x.h | 970 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
1069 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| /bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/inc/ |
| A D | ch32f20x.h | 970 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
1069 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| /bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/ |
| A D | air32f10x.h | 969 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
1053 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| /bsp/n32/libraries/N32WB452_Firmware_Library/CMSIS/device/ |
| A D | n32wb452.h | 983 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
1060 #define TIM5 ((TIM_Module*)TIM5_BASE)
|
| /bsp/n32/libraries/N32L40x_Firmware_Library/CMSIS/device/ |
| A D | n32l40x.h | 940 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
1004 #define TIM5 ((TIM_Module*)TIM5_BASE)
|
| /bsp/n32/libraries/N32L43x_Firmware_Library/CMSIS/device/ |
| A D | n32l43x.h | 966 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
1030 #define TIM5 ((TIM_Module*)TIM5_BASE)
|
| /bsp/n32/libraries/N32G43x_Firmware_Library/CMSIS/device/ |
| A D | n32g43x.h | 925 #define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) macro
987 #define TIM5 ((TIM_Module*)TIM5_BASE)
|
| /bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/ |
| A D | stm32l162xdx.h | 686 #define TIM5_BASE (APB1PERIPH_BASE + 0x00000C00UL) macro
767 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| A D | stm32l162xe.h | 686 #define TIM5_BASE (APB1PERIPH_BASE + 0x00000C00UL) macro
767 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| A D | stm32l152xc.h | 652 #define TIM5_BASE (APB1PERIPH_BASE + 0x00000C00UL) macro
728 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| A D | stm32l152xca.h | 652 #define TIM5_BASE (APB1PERIPH_BASE + 0x00000C00UL) macro
730 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| A D | stm32l152xe.h | 665 #define TIM5_BASE (APB1PERIPH_BASE + 0x00000C00UL) macro
745 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| A D | stm32l162xc.h | 673 #define TIM5_BASE (APB1PERIPH_BASE + 0x00000C00UL) macro
750 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|
| A D | stm32l162xca.h | 673 #define TIM5_BASE (APB1PERIPH_BASE + 0x00000C00UL) macro
752 #define TIM5 ((TIM_TypeDef *) TIM5_BASE)
|