| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/ |
| A D | stm32l1xx_ll_tim.h | 620 #define LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0 …
622 #define LL_TIM_DMABURST_BASEADDR_DIER (TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …
624 #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …
626 #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …
628 #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 | TIM_DCR_DBA_0) …
630 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …
631 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …
633 …SEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) /*!< TIMx_CC…
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| /bsp/mm32f327x/Libraries/MM32F327x/Include/ |
| A D | reg_tim.h | 595 #define TIM_DCR_DBA_0 (0x01U << TIM_DCR_DBA_Pos) ///< Bit 0 macro
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ |
| A D | ft32f030x6.h | 3636 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| A D | ft32f030x8.h | 3677 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| A D | ft32f072x8.h | 3726 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| A D | ft32f032x8.h | 3719 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| A D | ft32f032x6.h | 3718 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| A D | ft32f072xb.h | 3955 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| /bsp/mm32l3xx/Libraries/MM32L3xx/Include/ |
| A D | MM32L3xx.h | 3218 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| /bsp/mm32f103x/Libraries/MM32F103/Include/ |
| A D | MM32F103.h | 3227 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| /bsp/tkm32F499/Libraries/CMSIS_and_startup/ |
| A D | tk499.h | 3522 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| /bsp/mm32l07x/Libraries/MM32L0xx/Include/ |
| A D | MM32L0xx.h | 3347 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!<Bit 0 */ macro
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| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/ |
| A D | hk32f030x4x6x8.h | 4728 #define TIM_DCR_DBA_0 (0x01U << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | hk32f031x4x6.h | 4779 #define TIM_DCR_DBA_0 (0x01U << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | hk32f04ax4x6x8.h | 4708 #define TIM_DCR_DBA_0 (0x01U << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| /bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/ |
| A D | air32f10x.h | 3697 #define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!< Bit 0 */ macro
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| /bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/ |
| A D | stm32l100xb.h | 6002 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | stm32l100xba.h | 6150 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | stm32l151xb.h | 5954 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | stm32l151xba.h | 6030 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | stm32l152xb.h | 6104 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | stm32l152xba.h | 6165 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | stm32l100xc.h | 6719 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | stm32l162xdx.h | 7326 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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| A D | stm32l162xe.h | 7326 #define TIM_DCR_DBA_0 (0x01UL << TIM_DCR_DBA_Pos) /*!< 0x00000001 */ macro
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