| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/ |
| A D | stm32l1xx_ll_tim.h | 623 #define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 …
624 #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …
625 #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …
626 #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …
631 #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) …
632 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …
633 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM…
635 #define LL_TIM_DMABURST_BASEADDR_OR (TIM_DCR_DBA_4 | TIM_DCR_DBA_2) …
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| /bsp/mm32f327x/Libraries/MM32F327x/Include/ |
| A D | reg_tim.h | 597 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) ///< Bit 2 macro
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ |
| A D | ft32f030x6.h | 3638 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| A D | ft32f030x8.h | 3679 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| A D | ft32f072x8.h | 3728 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| A D | ft32f032x8.h | 3721 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| A D | ft32f032x6.h | 3720 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| A D | ft32f072xb.h | 3957 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| /bsp/mm32l3xx/Libraries/MM32L3xx/Include/ |
| A D | MM32L3xx.h | 3220 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| /bsp/mm32f103x/Libraries/MM32F103/Include/ |
| A D | MM32F103.h | 3229 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| /bsp/tkm32F499/Libraries/CMSIS_and_startup/ |
| A D | tk499.h | 3524 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| /bsp/mm32l07x/Libraries/MM32L0xx/Include/ |
| A D | MM32L0xx.h | 3349 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!<Bit 2 */ macro
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| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/ |
| A D | hk32f030x4x6x8.h | 4730 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | hk32f031x4x6.h | 4781 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | hk32f04ax4x6x8.h | 4710 #define TIM_DCR_DBA_2 (0x04U << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| /bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/ |
| A D | air32f10x.h | 3699 #define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!< Bit 2 */ macro
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| /bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/ |
| A D | stm32l100xb.h | 6004 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | stm32l100xba.h | 6152 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | stm32l151xb.h | 5956 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | stm32l151xba.h | 6032 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | stm32l152xb.h | 6106 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | stm32l152xba.h | 6167 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | stm32l100xc.h | 6721 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | stm32l162xdx.h | 7328 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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| A D | stm32l162xe.h | 7328 #define TIM_DCR_DBA_2 (0x04UL << TIM_DCR_DBA_Pos) /*!< 0x00000004 */ macro
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