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Searched refs:TIM_SMCR_ETF_3 (Results 1 – 25 of 38) sorted by relevance

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/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_tim.h598 #define LL_TIM_ETR_FILTER_FDIV8_N6 TIM_SMCR_ETF_3
599 #define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0) …
600 #define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1) …
601 #define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) …
602 #define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2) …
603 #define LL_TIM_ETR_FILTER_FDIV32_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0) …
604 #define LL_TIM_ETR_FILTER_FDIV32_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1) …
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_tim.h219 #define TIM_SMCR_ETF_3 (0x08U << TIM_SMCR_ETF_Pos) ///< Bit 3 macro
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h3419 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
A Dft32f030x8.h3460 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
A Dft32f072x8.h3511 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
A Dft32f032x8.h3502 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
A Dft32f032x6.h3501 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
A Dft32f072xb.h3740 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h3002 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h3011 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h3305 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h3117 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!<Bit 3 */ macro
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h4315 #define TIM_SMCR_ETF_3 (0x8U << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dhk32f031x4x6.h4366 #define TIM_SMCR_ETF_3 (0x8U << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dhk32f04ax4x6x8.h4295 #define TIM_SMCR_ETF_3 (0x8U << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x.h3480 #define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!< Bit 3 */ macro
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h5661 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dstm32l100xba.h5809 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dstm32l151xb.h5613 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dstm32l151xba.h5689 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dstm32l152xb.h5763 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dstm32l152xba.h5824 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dstm32l100xc.h6378 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dstm32l162xdx.h6985 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro
A Dstm32l162xe.h6985 #define TIM_SMCR_ETF_3 (0x8UL << TIM_SMCR_ETF_Pos) /*!< 0x00000800 */ macro

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