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Searched refs:TP_CTRL0 (Results 1 – 2 of 2) sorted by relevance

/bsp/allwinner/libraries/sunxi-hal/hal/source/tpadc/
A Dhal_tpadc.c53 reg_val = readl(reg_base + TP_CTRL0); in sunxi_set_acqiure_time()
56 writel(reg_val, reg_base + TP_CTRL0); in sunxi_set_acqiure_time()
63 reg_val = readl(reg_base + TP_CTRL0); in sunxi_set_frequency_divider()
66 writel(reg_val, reg_base + TP_CTRL0); in sunxi_set_frequency_divider()
73 reg_val = readl(reg_base + TP_CTRL0); in sunxi_set_clk_divider()
76 writel(reg_val, reg_base + TP_CTRL0); in sunxi_set_clk_divider()
83 reg_val = readl(reg_base + TP_CTRL0); in sunxi_select_delay_mode()
86 writel(reg_val, reg_base + TP_CTRL0); in sunxi_select_delay_mode()
93 reg_val = readl(reg_base + TP_CTRL0); in sunxi_set_dealy_time()
96 writel(reg_val, reg_base + TP_CTRL0); in sunxi_set_dealy_time()
A Dcommon_tpadc.h53 #define TP_CTRL0 0x00 macro

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