| /bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/ |
| A D | hri_tc_d51.h | 507 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_SWRST_bit()
524 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_ENABLE_bit()
533 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_write_CTRLA_ENABLE_bit()
536 ((Tc *)hw)->COUNT16.CTRLA.reg = tmp; in hri_tc_write_CTRLA_ENABLE_bit()
2072 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_PER_bf()
2081 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_write_PER_PER_bf()
2084 ((Tc *)hw)->COUNT8.PER.reg = tmp; in hri_tccount8_write_PER_PER_bf()
2109 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_read_PER_PER_bf()
2126 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_reg()
2134 ((Tc *)hw)->COUNT8.PER.reg = data; in hri_tccount8_write_PER_reg()
[all …]
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| /bsp/microchip/same54/bsp/hri/ |
| A D | hri_tc_e54.h | 507 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_SWRST_bit()
524 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_ENABLE_bit()
533 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_write_CTRLA_ENABLE_bit()
536 ((Tc *)hw)->COUNT16.CTRLA.reg = tmp; in hri_tc_write_CTRLA_ENABLE_bit()
2072 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_PER_bf()
2081 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_write_PER_PER_bf()
2084 ((Tc *)hw)->COUNT8.PER.reg = tmp; in hri_tccount8_write_PER_PER_bf()
2109 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_read_PER_PER_bf()
2126 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_reg()
2134 ((Tc *)hw)->COUNT8.PER.reg = data; in hri_tccount8_write_PER_reg()
[all …]
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| /bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/ |
| A D | hri_tc_d51.h | 507 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_SWRST_bit()
524 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_ENABLE_bit()
533 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_write_CTRLA_ENABLE_bit()
536 ((Tc *)hw)->COUNT16.CTRLA.reg = tmp; in hri_tc_write_CTRLA_ENABLE_bit()
2072 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_PER_bf()
2081 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_write_PER_PER_bf()
2084 ((Tc *)hw)->COUNT8.PER.reg = tmp; in hri_tccount8_write_PER_PER_bf()
2109 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_read_PER_PER_bf()
2126 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_reg()
2134 ((Tc *)hw)->COUNT8.PER.reg = data; in hri_tccount8_write_PER_reg()
[all …]
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| /bsp/microchip/samc21/bsp/hri/ |
| A D | hri_tc_c21.h | 507 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_SWRST_bit()
524 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_ENABLE_bit()
533 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_write_CTRLA_ENABLE_bit()
536 ((Tc *)hw)->COUNT16.CTRLA.reg = tmp; in hri_tc_write_CTRLA_ENABLE_bit()
1968 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_PER_bf()
1977 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_write_PER_PER_bf()
1980 ((Tc *)hw)->COUNT8.PER.reg = tmp; in hri_tccount8_write_PER_PER_bf()
2005 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_read_PER_PER_bf()
2022 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_reg()
2030 ((Tc *)hw)->COUNT8.PER.reg = data; in hri_tccount8_write_PER_reg()
[all …]
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| /bsp/microchip/saml10/bsp/hri/ |
| A D | hri_tc_l10.h | 511 tmp = ((Tc *)hw)->COUNT16.CTRLA.reg; in hri_tc_get_CTRLA_SWRST_bit()
2076 tmp = ((Tc *)hw)->COUNT32.PER.reg; in hri_tccount32_get_PER_PER_bf()
2085 tmp = ((Tc *)hw)->COUNT32.PER.reg; in hri_tccount32_write_PER_PER_bf()
2088 ((Tc *)hw)->COUNT32.PER.reg = tmp; in hri_tccount32_write_PER_PER_bf()
2113 tmp = ((Tc *)hw)->COUNT32.PER.reg; in hri_tccount32_read_PER_PER_bf()
2130 tmp = ((Tc *)hw)->COUNT32.PER.reg; in hri_tccount32_get_PER_reg()
2278 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_get_PER_PER_bf()
2287 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_write_PER_PER_bf()
2290 ((Tc *)hw)->COUNT8.PER.reg = tmp; in hri_tccount8_write_PER_PER_bf()
2315 tmp = ((Tc *)hw)->COUNT8.PER.reg; in hri_tccount8_read_PER_PER_bf()
[all …]
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| /bsp/microchip/same70/bsp/hri/ |
| A D | hri_tc_e70b.h | 4476 tmp = ((Tc *)hw)->TC_BMR; in hri_tc_get_BMR_QDEN_bit()
4485 tmp = ((Tc *)hw)->TC_BMR; in hri_tc_write_BMR_QDEN_bit()
4488 ((Tc *)hw)->TC_BMR = tmp; in hri_tc_write_BMR_QDEN_bit()
4516 tmp = ((Tc *)hw)->TC_BMR; in hri_tc_get_BMR_POSEN_bit()
4525 tmp = ((Tc *)hw)->TC_BMR; in hri_tc_write_BMR_POSEN_bit()
4528 ((Tc *)hw)->TC_BMR = tmp; in hri_tc_write_BMR_POSEN_bit()
4556 tmp = ((Tc *)hw)->TC_BMR; in hri_tc_get_BMR_SPEEDEN_bit()
4565 tmp = ((Tc *)hw)->TC_BMR; in hri_tc_write_BMR_SPEEDEN_bit()
4568 ((Tc *)hw)->TC_BMR = tmp; in hri_tc_write_BMR_SPEEDEN_bit()
4596 tmp = ((Tc *)hw)->TC_BMR; in hri_tc_get_BMR_QDTRANS_bit()
[all …]
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| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/ |
| A D | samd20j14.h | 470 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
473 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
474 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
475 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
476 #define TC6 ((Tc *)0x42003800UL) /**< \brief (TC6) APB Base Address */
477 #define TC7 ((Tc *)0x42003C00UL) /**< \brief (TC7) APB Base Address */
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| A D | samd20j15.h | 470 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
473 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
474 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
475 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
476 #define TC6 ((Tc *)0x42003800UL) /**< \brief (TC6) APB Base Address */
477 #define TC7 ((Tc *)0x42003C00UL) /**< \brief (TC7) APB Base Address */
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| A D | samd20j16.h | 470 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
473 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
474 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
475 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
476 #define TC6 ((Tc *)0x42003800UL) /**< \brief (TC6) APB Base Address */
477 #define TC7 ((Tc *)0x42003C00UL) /**< \brief (TC7) APB Base Address */
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| A D | samd20j17.h | 470 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
473 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
474 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
475 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
476 #define TC6 ((Tc *)0x42003800UL) /**< \brief (TC6) APB Base Address */
477 #define TC7 ((Tc *)0x42003C00UL) /**< \brief (TC7) APB Base Address */
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| A D | samd20j18.h | 470 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
471 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
472 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
473 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
474 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
475 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
476 #define TC6 ((Tc *)0x42003800UL) /**< \brief (TC6) APB Base Address */
477 #define TC7 ((Tc *)0x42003C00UL) /**< \brief (TC7) APB Base Address */
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| A D | samd20e14.h | 448 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
451 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
452 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
453 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20e15.h | 448 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
451 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
452 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
453 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20g14.h | 457 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
460 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
461 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
462 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20g15.h | 457 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
460 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
461 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
462 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20g16.h | 457 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
460 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
461 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
462 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20g17.h | 457 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
460 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
461 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
462 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20g17u.h | 457 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
460 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
461 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
462 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20g18.h | 457 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
460 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
461 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
462 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20g18u.h | 457 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
458 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
459 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
460 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
461 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
462 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20e16.h | 448 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
451 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
452 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
453 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20e17.h | 448 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
451 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
452 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
453 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| A D | samd20e18.h | 448 #define TC0 ((Tc *)0x42002000UL) /**< \brief (TC0) APB Base Address */
449 #define TC1 ((Tc *)0x42002400UL) /**< \brief (TC1) APB Base Address */
450 #define TC2 ((Tc *)0x42002800UL) /**< \brief (TC2) APB Base Address */
451 #define TC3 ((Tc *)0x42002C00UL) /**< \brief (TC3) APB Base Address */
452 #define TC4 ((Tc *)0x42003000UL) /**< \brief (TC4) APB Base Address */
453 #define TC5 ((Tc *)0x42003400UL) /**< \brief (TC5) APB Base Address */
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/tc/tc_sam_d_r_h/ |
| A D | tc.c | 77 Tc *const hw) in _tc_get_inst_index()
80 Tc *const tc_modules[TC_INST_NUM] = TC_INSTS; in _tc_get_inst_index()
118 Tc *const hw, in tc_init()
409 Tc *const tc_module = module_inst->hw; in tc_set_count_value()
452 Tc *const tc_module = module_inst->hw; in tc_get_count_value()
493 Tc *const tc_module = module_inst->hw; in tc_get_capture_value()
548 Tc *const tc_module = module_inst->hw; in tc_set_compare_value()
662 Tc *const tc_module = module_inst->hw; in tc_set_top_value()
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/tc/tc_sam_l_c/ |
| A D | tc.c | 62 Tc *const hw) in _tc_get_inst_index()
65 Tc *const tc_modules[TC_INST_NUM] = TC_INSTS; in _tc_get_inst_index()
103 Tc *const hw, in tc_init()
417 Tc *const tc_module = module_inst->hw; in tc_set_count_value()
463 Tc *const tc_module = module_inst->hw; in tc_get_count_value()
504 Tc *const tc_module = module_inst->hw; in tc_get_capture_value()
560 Tc *const tc_module = module_inst->hw; in tc_set_compare_value()
688 Tc *const tc_module = module_inst->hw; in tc_set_top_value()
|