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Searched refs:UART_DLM (Results 1 – 10 of 10) sorted by relevance

/bsp/nxp/lpc/lpc2148/drivers/
A Dserial.c32 #define UART_DLM(base) REG8(base + 0x04) macro
332 UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF; in rt_hw_serial_init()
370 UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF; in rt_hw_serial_init()
/bsp/nxp/lpc/lpc2478/drivers/
A Dserial.c32 #define UART_DLM(base) REG8(base + 0x04) macro
305 UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF; in rt_hw_serial_init()
343 UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF; in rt_hw_serial_init()
/bsp/cvitek/drivers/
A Ddrv_uart.h45 #define UART_DLM 1 /* Out: Divisor Latch High */ macro
A Ddrv_uart.c110 dw8250_write32(addr, UART_DLM, (baud_divisor >> 8) & 0xff); in dw8250_uart_setbrg()
/bsp/rockchip/rk3568/driver/
A Ddrv_uart.c27 #define UART_DLM 1 /* Out: Divisor Latch High */ macro
180 dw8250_write32(base, UART_DLM, (rate & 0xff00) >> 8); in dw8250_uart_configure()
/bsp/rockchip/rk3500/driver/uart8250/
A Dregs.h150 #define UART_DLM 1 /* Out: Divisor Latch High */ macro
A Dearly.c61 serial8250_early_out(serial, UART_DLM, (divisor >> 8) & 0xff); in init_serial()
A Dcore.c233 serial->serial_out(serial, UART_DLM, (divisor >> 8) & 0xff); in serial8250_uart_configure()
A Dfiq-debugger.c121 rockchip_fiq_write(t, dlm, UART_DLM); in fiq_debugger_uart_configure()
/bsp/wch/arm/ch579m/libraries/StdPeriphDriver/inc/
A DCH579SFR.h954 #define UART_DLM 0x0D macro

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