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Searched refs:UART_IER (Results 1 – 25 of 31) sorted by relevance

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/bsp/ultrarisc/drivers/
A Ddrv_uart.c48 rt_uint32_t ier = read8_uart(uart->hw_base, UART_IER); in _uart_configure()
50 write8_uart(uart->hw_base, UART_IER, 0x00); in _uart_configure()
62 write8_uart(uart->hw_base, UART_IER, ier); in _uart_configure()
75 rt_uint8_t value = read8_uart(uart->hw_base, UART_IER); in _uart_control()
76 write8_uart(uart->hw_base, UART_IER, value & ~UART_IER_RX_ENABLE); in _uart_control()
83 rt_uint8_t value = read8_uart(uart->hw_base, UART_IER); in _uart_control()
84 write8_uart(uart->hw_base, UART_IER, value | UART_IER_RX_ENABLE); in _uart_control()
170 write8_uart(uart->hw_base, UART_IER, 0); in rt_hw_uart_init()
A Ddrv_uart.h26 #define UART_IER 1 macro
/bsp/qemu-virt64-riscv/driver/
A Ddrv_uart.c37 write8_uart0(UART_IER, 0x00); in uart_init()
67 rt_uint8_t value = read8_uart0(UART_IER); in _uart_control()
68 write8_uart0(UART_IER, value & ~UART_IER_RX_ENABLE); in _uart_control()
75 rt_uint8_t value = read8_uart0(UART_IER); in _uart_control()
76 write8_uart0(UART_IER, value | UART_IER_RX_ENABLE); in _uart_control()
A Ddrv_uart.h25 #define UART_IER 1 macro
/bsp/xuantie/virt64/c906/board/
A Ddrv_uart.c37 write8_uart0(UART_IER, 0x00); in uart_init()
67 rt_uint8_t value = read8_uart0(UART_IER); in _uart_control()
68 write8_uart0(UART_IER, value & ~UART_IER_RX_ENABLE); in _uart_control()
75 rt_uint8_t value = read8_uart0(UART_IER); in _uart_control()
76 write8_uart0(UART_IER, value | UART_IER_RX_ENABLE); in _uart_control()
A Ddrv_uart.h25 #define UART_IER 1 macro
/bsp/microchip/same70/bsp/hri/
A Dhri_uart_e70b.h64 ((Uart *)hw)->UART_IER = UART_IMR_RXRDY; in hri_uart_set_IMR_RXRDY_bit()
77 ((Uart *)hw)->UART_IER = UART_IMR_RXRDY; in hri_uart_write_IMR_RXRDY_bit()
88 ((Uart *)hw)->UART_IER = UART_IMR_TXRDY; in hri_uart_set_IMR_TXRDY_bit()
112 ((Uart *)hw)->UART_IER = UART_IMR_OVRE; in hri_uart_set_IMR_OVRE_bit()
125 ((Uart *)hw)->UART_IER = UART_IMR_OVRE; in hri_uart_write_IMR_OVRE_bit()
136 ((Uart *)hw)->UART_IER = UART_IMR_FRAME; in hri_uart_set_IMR_FRAME_bit()
160 ((Uart *)hw)->UART_IER = UART_IMR_PARE; in hri_uart_set_IMR_PARE_bit()
208 ((Uart *)hw)->UART_IER = UART_IMR_CMP; in hri_uart_set_IMR_CMP_bit()
221 ((Uart *)hw)->UART_IER = UART_IMR_CMP; in hri_uart_write_IMR_CMP_bit()
232 ((Uart *)hw)->UART_IER = mask; in hri_uart_set_IMR_reg()
[all …]
/bsp/rockchip/rk3500/driver/uart8250/
A Dearly.c50 ier = serial8250_early_in(serial, UART_IER); in init_serial()
51 serial8250_early_out(serial, UART_IER, ier & UART_IER_UUE); /* no interrupt */ in init_serial()
110 rt_uint32_t ier = serial8250_early_in(serial, UART_IER); in serial8250_early_fdt_setup()
111 serial8250_early_out(serial, UART_IER, ier & UART_IER_UUE); in serial8250_early_fdt_setup()
A Dcore.c217 serial->serial_out(serial, UART_IER, !UART_IER_RDI); in serial8250_uart_configure()
242 serial->serial_out(serial, UART_IER, UART_IER_RDI); in serial8250_uart_configure()
256 serial->serial_out(serial, UART_IER, !UART_IER_RDI); in serial8250_uart_control()
262 serial->serial_out(serial, UART_IER, UART_IER_RDI); in serial8250_uart_control()
/bsp/rockchip/rk3568/driver/
A Ddrv_uart.c29 #define UART_IER 1 /* Out: Interrupt Enable Register */ macro
167 dw8250_write32(base, UART_IER, !UART_IER_RDI); in dw8250_uart_configure()
188 dw8250_write32(base, UART_IER, UART_IER_RDI); in dw8250_uart_configure()
204 dw8250_write32(uart->hw_base, UART_IER, !UART_IER_RDI); in dw8250_uart_control()
210 dw8250_write32(uart->hw_base, UART_IER, UART_IER_RDI); in dw8250_uart_control()
/bsp/cvitek/drivers/
A Ddrv_uart.c127 last_ier_state = dw8250_read32(base, UART_IER); in dw8250_uart_configure()
128 dw8250_write32(base, UART_IER, 0); in dw8250_uart_configure()
138 dw8250_write32(base, UART_IER, last_ier_state); in dw8250_uart_configure()
154 dw8250_write32(uart->hw_base, UART_IER, !UART_IER_RDI); in dw8250_uart_control()
160 dw8250_write32(uart->hw_base, UART_IER, UART_IER_RDI); in dw8250_uart_control()
A Ddrv_uart.h47 #define UART_IER 1 /* Out: Interrupt Enable Register */ macro
/bsp/loongson/ls2kdev/drivers/
A Ddrv_uart.c50 UART_IER(uart_dev->base) = 0; in ls2k_uart_set_buad()
60 UART_IER(uart_dev->base) = 0; /* clear interrupt */ in ls2k_uart_configure()
81 UART_IER(uart_dev->base) |= (IER_IRxE | IER_ILE); in ls2k_uart_control()
A Ddrv_uart.h19 #define UART_IER(base) HWREG8(base + 0x01) macro
/bsp/k230/drivers/interdrv/uart/
A Ddrv_uart.c27 #define UART_IER (0x04) /* interrupt enable register */ macro
150 write32(uart_base + UART_IER, 0x00); in _uart_init()
183 value = read32(uart_base + UART_IER); in uart_set_isr()
193 write32(uart_base + UART_IER, value); in uart_set_isr()
/bsp/allwinner_tina/drivers/
A Ddrv_uart.c193 writel(0x0, addr + UART_IER); in uart_configure()
217 writel(0x1, addr + UART_IER); in uart_configure()
234 writel(0x00, uart->hw_base + UART_IER); in uart_control()
242 writel(0x01, uart->hw_base + UART_IER); in uart_control()
A Ddrv_uart.h23 #define UART_IER (0X04) macro
/bsp/mipssim/drivers/
A Ddrv_uart.c40 UART_IER(uart_dev->base) = 0; /* clear interrupt */ in mipssim_uart_configure()
66 UART_IER(uart_dev->base) |= (IER_IRxE|IER_ILE); in mipssim_uart_control()
A Ddrv_uart.h19 #define UART_IER(base) HWREG8(base + 0x01) macro
/bsp/allwinner/libraries/sunxi-hal/hal/source/uart/
A Dhal_uart.c331 value = hal_readb(uart_base + UART_IER); in hal_uart_set_hardware_flowcontrol()
334 hal_writeb(uart_priv->ier, uart_base + UART_IER); in hal_uart_set_hardware_flowcontrol()
349 value = hal_readb(uart_base + UART_IER); in hal_uart_disable_flowcontrol()
352 hal_writeb(uart_priv->ier, uart_base + UART_IER); in hal_uart_disable_flowcontrol()
463 value = hal_readb(uart_base + UART_IER); in uart_enable_irq()
465 hal_writeb(value, uart_base + UART_IER); in uart_enable_irq()
/bsp/nxp/lpc/lpc2148/drivers/
A Dserial.c23 #define UART_IER(base) REG32(base + 0x04) macro
148 UART_IER(lpc_serial->hw_base) = 0x01; in rt_serial_open()
182 UART_IER(lpc_serial->hw_base) = 0x00; in rt_serial_close()
/bsp/nxp/lpc/lpc2478/drivers/
A Dserial.c23 #define UART_IER(base) REG32(base + 0x04) macro
134 UART_IER(lpc_serial->hw_base) = 0x01; in rt_serial_open()
155 UART_IER(lpc_serial->hw_base) = 0x00; in rt_serial_close()
/bsp/beaglebone/drivers/
A Duart_reg.h17 #define UART_IER(base) (base + 0x4) macro
65 #define UART_IER_REG(base) REG16(UART_IER(base))
/bsp/loongson/ls1bdev/drivers/
A Ddrv_uart.h36 #define UART_IER(base) HWREG8(base + 0x01) macro
/bsp/loongson/ls1cdev/drivers/
A Ddrv_uart.h36 #define UART_IER(base) HWREG8(base + 0x01) macro

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