UART_INPUT_CLK (reference) in projects: bsp

Searched refs:UART_INPUT_CLK (Results 1 – 3 of 3) sorted by relevance

/bsp/cvitek/drivers/
A D	drv_uart.h	`21 #define UART_INPUT_CLK 25000000 macro`
A D	drv_uart.c	`135 clock_divisor = DIV_ROUND_CLOSEST(UART_INPUT_CLK, 16 * serial->config.baud_rate); in dw8250_uart_configure()`
/bsp/rockchip/rk3568/driver/
A D	drv_uart.c	`60 #define UART_INPUT_CLK 24000000 macro 175 rate = UART_INPUT_CLK / 16 / serial->config.baud_rate; in dw8250_uart_configure()`

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