Home
last modified time | relevance | path

Searched refs:UART_LCR_DLAB (Results 1 – 15 of 15) sorted by relevance

/bsp/rockchip/common/rk_hal/lib/hal/src/
A Dhal_uart.c35 pReg->LCR |= UART_LCR_DLAB; in UART_EnableDLAB()
40 pReg->LCR &= ~(UART_LCR_DLAB); in UART_DisableDLAB()
140 pReg->LCR = UART_LCR_DLAB; in HAL_UART_Suspend()
163 pReg->LCR = UART_LCR_DLAB; in HAL_UART_Resume()
/bsp/airm2m/air105/libraries/HAL_Driver/Src/
A Dcore_uart.c160 Uart->LCR |= UART_LCR_DLAB; in Uart_BaseInit()
168 Uart->LCR &= ~UART_LCR_DLAB; in Uart_BaseInit()
223 Uart->LCR |= UART_LCR_DLAB; in Uart_DeInit()
228 Uart->LCR &= ~UART_LCR_DLAB; in Uart_DeInit()
582 Uart->LCR |= UART_LCR_DLAB; in Uart_ChangeBR()
590 Uart->LCR &= ~UART_LCR_DLAB; in Uart_ChangeBR()
/bsp/rockchip/rk3568/driver/
A Ddrv_uart.c36 #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ macro
178 dw8250_write32(base, UART_LCR, dw8250_read32(base, UART_LCR) | UART_LCR_DLAB); in dw8250_uart_configure()
182 dw8250_write32(base, UART_LCR, dw8250_read32(base, UART_LCR) & (~UART_LCR_DLAB)); in dw8250_uart_configure()
/bsp/rockchip/rk3500/driver/uart8250/
A Dregs.h94 #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ macro
108 #define UART_LCR_CONF_MODE_A UART_LCR_DLAB /* Configutation mode A */
A Dearly.c59 serial8250_early_out(serial, UART_LCR, c | UART_LCR_DLAB); in init_serial()
62 serial8250_early_out(serial, UART_LCR, c & ~UART_LCR_DLAB); in init_serial()
A Dcore.c231 serial->serial_out(serial, UART_LCR, serial->serial_in(serial, UART_LCR) | UART_LCR_DLAB); in serial8250_uart_configure()
235 … serial->serial_out(serial, UART_LCR, serial->serial_in(serial, UART_LCR) & (~UART_LCR_DLAB)); in serial8250_uart_configure()
/bsp/cvitek/drivers/
A Ddrv_uart.h75 #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ macro
/bsp/allwinner/libraries/sunxi-hal/hal/source/uart/
A Duart.h99 #define UART_LCR_DLAB (BIT(7)) macro
A Dhal_uart.c294 hal_writeb(uart_priv->lcr | UART_LCR_DLAB, uart_base + UART_LCR); in uart_set_baudrate()
/bsp/rockchip/common/rk_hal/lib/hal/inc/
A Dhal_uart.h88 #define UART_LCR_DLAB 0x80 /**< Divisor latch access bit */ macro
/bsp/rockchip/common/rk_hal/lib/hal/src/pm/
A Dhal_pm_rk2108.c599 pUart->LCR = UART_LCR_DLAB; in SOC_UartSave()
611 pUart->LCR = UART_LCR_DLAB; in SOC_UartRestore()
/bsp/k230/drivers/interdrv/uart/
A Ddrv_uart.c55 #define UART_LCR_DLAB (BIT(7)) macro
/bsp/allwinner/libraries/drivers/
A Ddrv_uart.c279 #define UART_LCR_DLAB (BIT(7)) macro
459 hal_writeb(lcr | UART_LCR_DLAB, uart_base + UART_LCR); in uart_set_baudrate()
/bsp/airm2m/air105/libraries/HAL_Driver/Inc/
A Dair105.h1314 #define UART_LCR_DLAB ((uint32_t)0x0080) macro
/bsp/tae32f5300/Libraries/CMSIS/Device/Tai_action/TAE32F53xx/Include/
A Dtae32f53xx.h1879 #define UART_LCR_DLAB UART_LCR_DLAB_Msk macro

Completed in 83 milliseconds