| /bsp/ultrarisc/drivers/ |
| A D | drv_uart.c | 98 while ((read8_uart(uart->hw_base, UART_LSR) & UART_LSR_TX_IDLE) == 0) in _uart_putc()
112 lsr = read8_uart(uart->hw_base, UART_LSR); in _uart_getc()
138 if ((read8_uart(uart->hw_base, UART_LSR) & UART_LSR_RX_READY) != 0) in rt_hw_uart_isr()
172 while ((read8_uart(uart->hw_base, UART_LSR) & UART_LSR_TX_IDLE) == 0) in rt_hw_uart_init()
175 while ((read8_uart(uart->hw_base, UART_LSR) & UART_LSR_RX_READY) != 0) in rt_hw_uart_init()
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| A D | drv_uart.h | 45 #define UART_LSR 5 macro
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| /bsp/nxp/lpc/lpc2148/drivers/ |
| A D | serial.c | 28 #define UART_LSR(base) REG8(base + 0x14) macro
71 if (UART_LSR(lpc_serial->hw_base) & 0x01) in rt_hw_uart_isr()
75 while (UART_LSR(lpc_serial->hw_base) & 0x01) in rt_hw_uart_isr()
243 while (size && (UART_LSR(lpc_serial->hw_base) & 0x01)) in rt_serial_read()
282 while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); in rt_serial_write()
286 while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); in rt_serial_write()
297 while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); in rt_serial_write()
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| /bsp/nxp/lpc/lpc2478/drivers/ |
| A D | serial.c | 28 #define UART_LSR(base) REG8(base + 0x14) macro
72 if (UART_LSR(lpc_serial->hw_base) & 0x01) in rt_hw_uart_isr()
76 while (UART_LSR(lpc_serial->hw_base) & 0x01) in rt_hw_uart_isr()
216 while (size && (UART_LSR(lpc_serial->hw_base) & 0x01)) in rt_serial_read()
255 while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); in rt_serial_write()
259 while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); in rt_serial_write()
270 while (!(UART_LSR(lpc_serial->hw_base) & 0x20)); in rt_serial_write()
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| /bsp/k230/drivers/interdrv/uart/ |
| A D | drv_uart.c | 32 #define UART_LSR (0x14) /* line status register */ macro
168 read32(uart_base + UART_LSR); in _uart_init()
284 while (!(read32(uart->hw_base + UART_LSR) & 0x20)); in drv_uart_putc()
294 volatile uint32_t *lsr = (uint32_t *)(uart->hw_base + UART_LSR); in drv_uart_getc()
315 lsr = readb((void*)(uart_base + UART_LSR)); in rt_hw_uart_isr()
338 lsr = readb((void*)(uart_base + UART_LSR)); in rt_hw_uart_isr()
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| /bsp/mipssim/drivers/ |
| A D | drv_uart.c | 45 UART_LSR(uart_dev->base) = 0x60; in mipssim_uart_configure()
79 unsigned char status = UART_LSR(uart_dev->base); in uart_is_transmit_empty()
115 if (LSR_RXRDY & UART_LSR(uart_dev->base)) in mipssim_uart_getc()
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| A D | drv_uart.h | 24 #define UART_LSR(base) HWREG8(base + 0x05) macro
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| /bsp/loongson/ls2kdev/drivers/ |
| A D | drv_uart.c | 65 UART_LSR(uart_dev->base) = 0x60; in ls2k_uart_configure()
90 unsigned char status = UART_LSR(uart_dev->base); in uart_is_transmit_empty()
115 if (LSR_RXRDY & UART_LSR(uart_dev->base)) in ls2k_uart_getc()
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| A D | drv_uart.h | 24 #define UART_LSR(base) HWREG8(base + 0x05) macro
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| /bsp/cvitek/drivers/ |
| A D | drv_uart.c | 125 while (!(dw8250_read32(base, UART_LSR) & UART_LSR_TEMT)); in dw8250_uart_configure()
177 while ((dw8250_read32(base, UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY); in dw8250_uart_putc()
194 if (dw8250_read32(base, UART_LSR) & UART_LSR_DR) in dw8250_uart_getc()
221 status = dw8250_read32(uart->hw_base, UART_LSR); in rt_hw_uart_isr()
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| A D | drv_uart.h | 82 #define UART_LSR 5 /* In: Line Status Register */ macro
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| /bsp/qemu-virt64-riscv/driver/ |
| A D | drv_uart.c | 90 while((read8_uart0(UART_LSR) & UART_LSR_TX_IDLE) == 0) in _uart_putc()
104 lsr = read8_uart0(UART_LSR); in _uart_getc()
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| A D | drv_uart.h | 44 #define UART_LSR 5 macro
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| /bsp/xuantie/virt64/c906/board/ |
| A D | drv_uart.c | 90 while((read8_uart0(UART_LSR) & UART_LSR_TX_IDLE) == 0) in _uart_putc()
104 lsr = read8_uart0(UART_LSR); in _uart_getc()
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| A D | drv_uart.h | 44 #define UART_LSR 5 macro
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| /bsp/rockchip/rk3500/driver/uart8250/ |
| A D | fiq-debugger.c | 56 rt_uint32_t ret = rockchip_fiq_read(t, UART_LSR); in rockchip_fiq_read_lsr()
92 if (rockchip_fiq_read(t, UART_LSR) & UART_LSR_DR) in fiq_debugger_uart_configure()
97 while (!(rockchip_fiq_read(t, UART_LSR) & UART_LSR_TEMT) && count--) in fiq_debugger_uart_configure()
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| A D | core.c | 274 while (!(serial->serial_in(serial, UART_LSR) & 0x20)) in serial8250_uart_putc()
289 if ((serial->serial_in(serial, UART_LSR) & 0x1)) in serial8250_uart_getc()
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| A D | regs.h | 122 #define UART_LSR 5 /* In: Line Status Register */ macro
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| /bsp/rockchip/rk3568/driver/ |
| A D | drv_uart.c | 45 #define UART_LSR 5 /* In: Line Status Register */ macro
246 if ((dw8250_read32(base, UART_LSR) & 0x1)) in dw8250_uart_getc()
277 status = dw8250_read32(uart->hw_base, UART_LSR); in rt_hw_uart_isr()
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| /bsp/allwinner/libraries/drivers/ |
| A D | drv_uart.c | 233 #define UART_LSR (0x14) /* line status register */ macro
696 while (!(hal_readl(uart_base + UART_LSR) & UART_LSR_TEMT)) in _uart_putc()
750 if (hal_readl(uart_base + UART_LSR) & UART_LSR_TEMT) in _uart_transmit()
769 if (hal_readl(uart_base + UART_LSR) & UART_LSR_TEMT) in _uart_transmit()
806 lsr = hal_readb(uart_base + UART_LSR); in uart_irq_handler()
846 lsr = hal_readb(uart_base + UART_LSR); in uart_irq_handler()
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| /bsp/allwinner_tina/drivers/ |
| A D | drv_uart.h | 28 #define UART_LSR (0X14) macro
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| /bsp/beaglebone/drivers/ |
| A D | uart_reg.h | 24 #define UART_LSR(base) (base + 0x14) macro
72 #define UART_LSR_REG(base) REG16(UART_LSR(base))
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| /bsp/loongson/ls1bdev/drivers/ |
| A D | drv_uart.h | 41 #define UART_LSR(base) HWREG8(base + 0x05) macro
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| /bsp/loongson/ls1cdev/drivers/ |
| A D | drv_uart.h | 41 #define UART_LSR(base) HWREG8(base + 0x05) macro
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/uart/ |
| A D | uart.h | 53 #define UART_LSR (0x14) /* line status register */ macro
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