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Searched refs:UDMA_ENASET (Results 1 – 12 of 12) sorted by relevance

/bsp/lm4f232/Libraries/driverlib/
A Dudma.c145 HWREG(UDMA_ENASET) = 1 << (ulChannelNum & 0x1f); in uDMAChannelEnable()
200 return((HWREG(UDMA_ENASET) & (1 << (ulChannelNum & 0x1f))) ? true : false); in uDMAChannelIsEnabled()
/bsp/lm3s9b9x/Libraries/driverlib/
A Dudma.c145 HWREG(UDMA_ENASET) = 1 << (ulChannelNum & 0x1f); in uDMAChannelEnable()
200 return((HWREG(UDMA_ENASET) & (1 << (ulChannelNum & 0x1f))) ? true : false); in uDMAChannelIsEnabled()
/bsp/lm3s8962/Libraries/driverlib/
A Dudma.c145 HWREG(UDMA_ENASET) = 1 << (ulChannelNum & 0x1f); in uDMAChannelEnable()
200 return((HWREG(UDMA_ENASET) & (1 << (ulChannelNum & 0x1f))) ? true : false); in uDMAChannelIsEnabled()
/bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/
A Dudma.c182 HWREG(UDMA_ENASET) = 1 << (ui32ChannelNum & 0x1f); in uDMAChannelEnable()
237 return ((HWREG(UDMA_ENASET) & (1 << (ui32ChannelNum & 0x1f))) ? true : in uDMAChannelIsEnabled()
/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/src/
A Dudma.c162 HWREG(UDMA_ENASET) = 1 << (ui32ChannelNum & 0x1f); in uDMAChannelEnable()
217 return((HWREG(UDMA_ENASET) & (1 << (ui32ChannelNum & 0x1f))) ? true : in uDMAChannelIsEnabled()
/bsp/tm4c129x/libraries/driverlib/
A Dudma.c162 HWREG(UDMA_ENASET) = 1 << (ui32ChannelNum & 0x1f); in uDMAChannelEnable()
217 return((HWREG(UDMA_ENASET) & (1 << (ui32ChannelNum & 0x1f))) ? true : in uDMAChannelIsEnabled()
/bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/inc/
A Dhw_udma.h59 #define UDMA_ENASET 0x400FF028 // DMA Channel Enable Set macro
/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/driverlib/inc/
A Dhw_udma.h61 #define UDMA_ENASET 0x400FF028 // DMA Channel Enable Set macro
/bsp/lm3s9b9x/Libraries/inc/
A Dhw_udma.h46 #define UDMA_ENASET 0x400FF028 // DMA Channel Enable Set macro
/bsp/lm3s8962/Libraries/inc/
A Dhw_udma.h46 #define UDMA_ENASET 0x400FF028 // DMA Channel Enable Set macro
/bsp/lm4f232/Libraries/inc/
A Dhw_udma.h46 #define UDMA_ENASET 0x400FF028 // DMA Channel Enable Set macro
/bsp/tm4c129x/libraries/inc/
A Dhw_udma.h61 #define UDMA_ENASET 0x400FF028 // DMA Channel Enable Set macro

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