Home
last modified time | relevance | path

Searched refs:VALUE (Results 1 – 25 of 272) sorted by relevance

1234567891011

/bsp/rm48x50/HALCoGen/
A DHALCoGen.dil5 DRIVER.TOOLS.VAR.ARM.VALUE=0
6 DRIVER.TOOLS.VAR.IAR.VALUE=0
7 DRIVER.TOOLS.VAR.GHS.VALUE=0
8 DRIVER.TOOLS.VAR.TI.VALUE=1
7410 DRIVER.PINMUX.VAR.AD1.VALUE=0
7412 DRIVER.PINMUX.VAR.AD2.VALUE=0
7442 DRIVER.PINMUX.VAR.I2C.VALUE=0
7736 DRIVER.PINMUX.VAR.DMM.VALUE=0
7872 DRIVER.PINMUX.VAR.ETM.VALUE=0
7930 DRIVER.PINMUX.VAR.MII.VALUE=0
[all …]
A DHALCoGen_bak.dil5 DRIVER.TOOLS.VAR.ARM.VALUE=0
6 DRIVER.TOOLS.VAR.IAR.VALUE=0
7 DRIVER.TOOLS.VAR.GHS.VALUE=0
8 DRIVER.TOOLS.VAR.TI.VALUE=1
7410 DRIVER.PINMUX.VAR.AD1.VALUE=0
7412 DRIVER.PINMUX.VAR.AD2.VALUE=0
7442 DRIVER.PINMUX.VAR.I2C.VALUE=0
7736 DRIVER.PINMUX.VAR.DMM.VALUE=0
7872 DRIVER.PINMUX.VAR.ETM.VALUE=0
7930 DRIVER.PINMUX.VAR.MII.VALUE=0
[all …]
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_hal_dac_ex.h106 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ argument
107 ((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \
108 ((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \
109 ((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \
110 ((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \
111 ((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \
112 ((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \
113 ((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \
114 ((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \
115 ((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \
[all …]
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/inc/
A Dn32l43x_dac.h186 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) … argument
187 …(((VALUE) == DAC_UNMASK_LFSRBIT0) || ((VALUE) == DAC_UNMASK_LFSRBITS1_0) || ((VALUE) == DAC_UNMASK…
188 …|| ((VALUE) == DAC_UNMASK_LFSRBITS3_0) || ((VALUE) == DAC_UNMASK_LFSRBITS4_0) …
189 …|| ((VALUE) == DAC_UNMASK_LFSRBITS5_0) || ((VALUE) == DAC_UNMASK_LFSRBITS6_0) …
190 …|| ((VALUE) == DAC_UNMASK_LFSRBITS7_0) || ((VALUE) == DAC_UNMASK_LFSRBITS8_0) …
191 …|| ((VALUE) == DAC_UNMASK_LFSRBITS9_0) || ((VALUE) == DAC_UNMASK_LFSRBITS10_0) …
192 …|| ((VALUE) == DAC_UNMASK_LFSRBITS11_0) || ((VALUE) == DAC_TRIAMP_1) || ((VALUE) == DAC_TRIAMP_3) …
193 …|| ((VALUE) == DAC_TRIAMP_7) || ((VALUE) == DAC_TRIAMP_15) || ((VALUE) == DAC_TRIAMP_31) …
194 …|| ((VALUE) == DAC_TRIAMP_63) || ((VALUE) == DAC_TRIAMP_127) || ((VALUE) == DAC_TRIAMP_255) …
195 …|| ((VALUE) == DAC_TRIAMP_511) || ((VALUE) == DAC_TRIAMP_1023) || ((VALUE) == DAC_TRIAMP_2047) …
[all …]
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/inc/
A Dn32l40x_dac.h186 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) … argument
187 …(((VALUE) == DAC_UNMASK_LFSRBIT0) || ((VALUE) == DAC_UNMASK_LFSRBITS1_0) || ((VALUE) == DAC_UNMASK…
188 …|| ((VALUE) == DAC_UNMASK_LFSRBITS3_0) || ((VALUE) == DAC_UNMASK_LFSRBITS4_0) …
189 …|| ((VALUE) == DAC_UNMASK_LFSRBITS5_0) || ((VALUE) == DAC_UNMASK_LFSRBITS6_0) …
190 …|| ((VALUE) == DAC_UNMASK_LFSRBITS7_0) || ((VALUE) == DAC_UNMASK_LFSRBITS8_0) …
191 …|| ((VALUE) == DAC_UNMASK_LFSRBITS9_0) || ((VALUE) == DAC_UNMASK_LFSRBITS10_0) …
192 …|| ((VALUE) == DAC_UNMASK_LFSRBITS11_0) || ((VALUE) == DAC_TRIAMP_1) || ((VALUE) == DAC_TRIAMP_3) …
193 …|| ((VALUE) == DAC_TRIAMP_7) || ((VALUE) == DAC_TRIAMP_15) || ((VALUE) == DAC_TRIAMP_31) …
194 …|| ((VALUE) == DAC_TRIAMP_63) || ((VALUE) == DAC_TRIAMP_127) || ((VALUE) == DAC_TRIAMP_255) …
195 …|| ((VALUE) == DAC_TRIAMP_511) || ((VALUE) == DAC_TRIAMP_1023) || ((VALUE) == DAC_TRIAMP_2047) …
[all …]
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/inc/
A Dn32g43x_dac.h186 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) … argument
187 …(((VALUE) == DAC_UNMASK_LFSRBIT0) || ((VALUE) == DAC_UNMASK_LFSRBITS1_0) || ((VALUE) == DAC_UNMASK…
188 …|| ((VALUE) == DAC_UNMASK_LFSRBITS3_0) || ((VALUE) == DAC_UNMASK_LFSRBITS4_0) …
189 …|| ((VALUE) == DAC_UNMASK_LFSRBITS5_0) || ((VALUE) == DAC_UNMASK_LFSRBITS6_0) …
190 …|| ((VALUE) == DAC_UNMASK_LFSRBITS7_0) || ((VALUE) == DAC_UNMASK_LFSRBITS8_0) …
191 …|| ((VALUE) == DAC_UNMASK_LFSRBITS9_0) || ((VALUE) == DAC_UNMASK_LFSRBITS10_0) …
192 …|| ((VALUE) == DAC_UNMASK_LFSRBITS11_0) || ((VALUE) == DAC_TRIAMP_1) || ((VALUE) == DAC_TRIAMP_3) …
193 …|| ((VALUE) == DAC_TRIAMP_7) || ((VALUE) == DAC_TRIAMP_15) || ((VALUE) == DAC_TRIAMP_31) …
194 …|| ((VALUE) == DAC_TRIAMP_63) || ((VALUE) == DAC_TRIAMP_127) || ((VALUE) == DAC_TRIAMP_255) …
195 …|| ((VALUE) == DAC_TRIAMP_511) || ((VALUE) == DAC_TRIAMP_1023) || ((VALUE) == DAC_TRIAMP_2047) …
[all …]
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/inc/
A DHAL_dac.h128 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \ argument
129 ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \
130 ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \
131 ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \
132 ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \
133 ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \
134 ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \
135 ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \
136 ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \
137 ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \
[all …]
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x_dac.h130 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \ argument
131 ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \
132 ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \
133 ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \
134 ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \
135 ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \
136 ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \
137 ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \
138 ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \
139 ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \
[all …]
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/inc/
A Dn32wb452_dac.h192 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) … argument
193 …(((VALUE) == DAC_UNMASK_LFSRBIT0) || ((VALUE) == DAC_UNMASK_LFSRBITS1_0) || ((VALUE) == DAC_UNMASK…
194 …|| ((VALUE) == DAC_UNMASK_LFSRBITS3_0) || ((VALUE) == DAC_UNMASK_LFSRBITS4_0) …
195 …|| ((VALUE) == DAC_UNMASK_LFSRBITS5_0) || ((VALUE) == DAC_UNMASK_LFSRBITS6_0) …
196 …|| ((VALUE) == DAC_UNMASK_LFSRBITS7_0) || ((VALUE) == DAC_UNMASK_LFSRBITS8_0) …
197 …|| ((VALUE) == DAC_UNMASK_LFSRBITS9_0) || ((VALUE) == DAC_UNMASK_LFSRBITS10_0) …
198 …|| ((VALUE) == DAC_UNMASK_LFSRBITS11_0) || ((VALUE) == DAC_TRIAMP_1) || ((VALUE) == DAC_TRIAMP_3) …
199 …|| ((VALUE) == DAC_TRIAMP_7) || ((VALUE) == DAC_TRIAMP_15) || ((VALUE) == DAC_TRIAMP_31) …
200 …|| ((VALUE) == DAC_TRIAMP_63) || ((VALUE) == DAC_TRIAMP_127) || ((VALUE) == DAC_TRIAMP_255) …
201 …|| ((VALUE) == DAC_TRIAMP_511) || ((VALUE) == DAC_TRIAMP_1023) || ((VALUE) == DAC_TRIAMP_2047) …
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/
A Dn32g4fr_dac.h192 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) … argument
193 …(((VALUE) == DAC_UNMASK_LFSRBIT0) || ((VALUE) == DAC_UNMASK_LFSRBITS1_0) || ((VALUE) == DAC_UNMASK…
194 …|| ((VALUE) == DAC_UNMASK_LFSRBITS3_0) || ((VALUE) == DAC_UNMASK_LFSRBITS4_0) …
195 …|| ((VALUE) == DAC_UNMASK_LFSRBITS5_0) || ((VALUE) == DAC_UNMASK_LFSRBITS6_0) …
196 …|| ((VALUE) == DAC_UNMASK_LFSRBITS7_0) || ((VALUE) == DAC_UNMASK_LFSRBITS8_0) …
197 …|| ((VALUE) == DAC_UNMASK_LFSRBITS9_0) || ((VALUE) == DAC_UNMASK_LFSRBITS10_0) …
198 …|| ((VALUE) == DAC_UNMASK_LFSRBITS11_0) || ((VALUE) == DAC_TRIAMP_1) || ((VALUE) == DAC_TRIAMP_3) …
199 …|| ((VALUE) == DAC_TRIAMP_7) || ((VALUE) == DAC_TRIAMP_15) || ((VALUE) == DAC_TRIAMP_31) …
200 …|| ((VALUE) == DAC_TRIAMP_63) || ((VALUE) == DAC_TRIAMP_127) || ((VALUE) == DAC_TRIAMP_255) …
201 …|| ((VALUE) == DAC_TRIAMP_511) || ((VALUE) == DAC_TRIAMP_1023) || ((VALUE) == DAC_TRIAMP_2047) …
[all …]
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/
A Dn32g45x_dac.h192 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) … argument
193 …(((VALUE) == DAC_UNMASK_LFSRBIT0) || ((VALUE) == DAC_UNMASK_LFSRBITS1_0) || ((VALUE) == DAC_UNMASK…
194 …|| ((VALUE) == DAC_UNMASK_LFSRBITS3_0) || ((VALUE) == DAC_UNMASK_LFSRBITS4_0) …
195 …|| ((VALUE) == DAC_UNMASK_LFSRBITS5_0) || ((VALUE) == DAC_UNMASK_LFSRBITS6_0) …
196 …|| ((VALUE) == DAC_UNMASK_LFSRBITS7_0) || ((VALUE) == DAC_UNMASK_LFSRBITS8_0) …
197 …|| ((VALUE) == DAC_UNMASK_LFSRBITS9_0) || ((VALUE) == DAC_UNMASK_LFSRBITS10_0) …
198 …|| ((VALUE) == DAC_UNMASK_LFSRBITS11_0) || ((VALUE) == DAC_TRIAMP_1) || ((VALUE) == DAC_TRIAMP_3) …
199 …|| ((VALUE) == DAC_TRIAMP_7) || ((VALUE) == DAC_TRIAMP_15) || ((VALUE) == DAC_TRIAMP_31) …
200 …|| ((VALUE) == DAC_TRIAMP_63) || ((VALUE) == DAC_TRIAMP_127) || ((VALUE) == DAC_TRIAMP_255) …
201 …|| ((VALUE) == DAC_TRIAMP_511) || ((VALUE) == DAC_TRIAMP_1023) || ((VALUE) == DAC_TRIAMP_2047) …
[all …]
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/
A Dn32g45x_dac.h192 #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) … argument
193 …(((VALUE) == DAC_UNMASK_LFSRBIT0) || ((VALUE) == DAC_UNMASK_LFSRBITS1_0) || ((VALUE) == DAC_UNMASK…
194 …|| ((VALUE) == DAC_UNMASK_LFSRBITS3_0) || ((VALUE) == DAC_UNMASK_LFSRBITS4_0) …
195 …|| ((VALUE) == DAC_UNMASK_LFSRBITS5_0) || ((VALUE) == DAC_UNMASK_LFSRBITS6_0) …
196 …|| ((VALUE) == DAC_UNMASK_LFSRBITS7_0) || ((VALUE) == DAC_UNMASK_LFSRBITS8_0) …
197 …|| ((VALUE) == DAC_UNMASK_LFSRBITS9_0) || ((VALUE) == DAC_UNMASK_LFSRBITS10_0) …
198 …|| ((VALUE) == DAC_UNMASK_LFSRBITS11_0) || ((VALUE) == DAC_TRIAMP_1) || ((VALUE) == DAC_TRIAMP_3) …
199 …|| ((VALUE) == DAC_TRIAMP_7) || ((VALUE) == DAC_TRIAMP_15) || ((VALUE) == DAC_TRIAMP_31) …
200 …|| ((VALUE) == DAC_TRIAMP_63) || ((VALUE) == DAC_TRIAMP_127) || ((VALUE) == DAC_TRIAMP_255) …
201 …|| ((VALUE) == DAC_TRIAMP_511) || ((VALUE) == DAC_TRIAMP_1023) || ((VALUE) == DAC_TRIAMP_2047) …
[all …]
/bsp/renesas/rzn2l_rsk/rzn/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE))) argument
282 #define __set_FPSCR(VALUE) ((void) VALUE) argument
285 #define __set_FPEXC(VALUE) ((void) VALUE) argument
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
319 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
328 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
352 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
556 #define __set_FPSCR(VALUE) ((void)VALUE) argument
[all …]
/bsp/renesas/rzt2m_rsk/rzt/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE))) argument
282 #define __set_FPSCR(VALUE) ((void) VALUE) argument
285 #define __set_FPEXC(VALUE) ((void) VALUE) argument
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
319 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
328 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
352 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
556 #define __set_FPSCR(VALUE) ((void)VALUE) argument
[all …]
/bsp/renesas/rzn2l_etherkit/rzn/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE))) argument
282 #define __set_FPSCR(VALUE) ((void) VALUE) argument
285 #define __set_FPEXC(VALUE) ((void) VALUE) argument
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
319 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
328 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
352 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
556 #define __set_FPSCR(VALUE) ((void)VALUE) argument
[all …]
/bsp/synwit/libraries/SWM341_CSL/CMSIS/CoreSupport/
A Dcmsis_iccarm.h309 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
312 #define __set_FPSCR(VALUE) ((void)VALUE) argument
341 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
346 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
348 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
351 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
355 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
357 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
367 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
379 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/acm32/acm32f4xx-nucleo/libraries/CMSIS/
A Dcmsis_iccarm.h309 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
312 #define __set_FPSCR(VALUE) ((void)VALUE) argument
341 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
346 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
348 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
351 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
355 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
357 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
367 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
379 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/hc32l136/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
310 #define __set_FPSCR(VALUE) ((void)VALUE) argument
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
344 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
353 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
365 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
377 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/microchip/samd51-adafruit-metro-m4/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/microchip/samc21/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/msp432e401y-LaunchPad/libraries/Drivers/CMSIS/Include/
A Dcmsis_iccarm.h286 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
289 #define __set_FPSCR(VALUE) ((void)VALUE) argument
318 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
323 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
325 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
328 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
332 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
334 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
344 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
356 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32L43x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32WB452_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]
/bsp/n32/libraries/N32L40x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) argument
281 #define __set_FPSCR(VALUE) ((void)VALUE) argument
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) argument
315 #define __set_MSPLIM(VALUE) ((void)(VALUE)) argument
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) argument
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) argument
324 #define __set_PSPLIM(VALUE) ((void)(VALUE)) argument
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) argument
336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) argument
348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) argument
[all …]

Completed in 1328 milliseconds

1234567891011