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Searched refs:XEMACPS_NWSR_MDIOIDLE_MASK (Results 1 – 2 of 2) sorted by relevance

/bsp/zynqmp-r5-axu4ev/drivers/Zynq_HAL_Driver/emacps_v3_11/
A Dxemacps_control.c983 XEMACPS_NWSR_MDIOIDLE_MASK))==TRUE) { in XEmacPs_PhyRead()
1000 } while ((IpReadTemp & XEMACPS_NWSR_MDIOIDLE_MASK) == 0x00000000U); in XEmacPs_PhyRead()
1064 XEMACPS_NWSR_MDIOIDLE_MASK))==TRUE) { in XEmacPs_PhyWrite()
1080 } while ((IpWriteTemp & XEMACPS_NWSR_MDIOIDLE_MASK) == 0x00000000U); in XEmacPs_PhyWrite()
A Dxemacps_hw.h369 #define XEMACPS_NWSR_MDIOIDLE_MASK 0x00000004U /**< PHY management idle */ macro

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